diff --git a/dts/bindings/pinctrl/intel,s1000-pinmux.yaml b/dts/bindings/pinctrl/intel,s1000-pinmux.yaml
new file mode 100644
index 00000000000..eb7d554f2ca
--- /dev/null
+++ b/dts/bindings/pinctrl/intel,s1000-pinmux.yaml
@@ -0,0 +1,26 @@
+---
+# SPDX-License-Identifier: Apache-2.0
+title: Intel S1000 Pinmux
+version: 0.1
+
+description: >
+    This is a representation of the Intel S1000 SoC's pinmux node
+
+properties:
+    compatible:
+      type: string
+      category: required
+      description: compatible strings
+      constraint: "intel,s1000-pinmux"
+      generation: define
+
+    reg:
+      type: int
+      description: mmio register space
+      generation: define
+      category: required
+
+"#cells":
+  - pin
+  - function
+...
diff --git a/dts/xtensa/intel_s1000.dtsi b/dts/xtensa/intel_s1000.dtsi
index d0188761b2c..3aee62ebfc3 100644
--- a/dts/xtensa/intel_s1000.dtsi
+++ b/dts/xtensa/intel_s1000.dtsi
@@ -97,6 +97,11 @@
 			#gpio-cells = <2>;
 		};
 
+		pinmux: pinmux@81C30 {
+			compatible = "intel,s1000-pinmux";
+			reg = <0x00081C30 0xC>;
+		};
+
 		uart0: uart@80800 {
 			compatible = "ns16550";
 			reg = <0x80800 0x400>;
diff --git a/soc/xtensa/intel_s1000/dts_fixup.h b/soc/xtensa/intel_s1000/dts_fixup.h
index f5706615570..b2a3dcded3e 100644
--- a/soc/xtensa/intel_s1000/dts_fixup.h
+++ b/soc/xtensa/intel_s1000/dts_fixup.h
@@ -77,4 +77,9 @@
 #define CONFIG_GPIO_DW_0_NAME		\
 	DT_SNPS_DESIGNWARE_GPIO_80C00_LABEL
 
+#define DT_PINMUX_BASE_ADDR		\
+	DT_INTEL_S1000_PINMUX_81C30_BASE_ADDRESS
+#define DT_PINMUX_CTRL_REG_COUNT	\
+	(DT_INTEL_S1000_PINMUX_81C30_SIZE / 4)
+
 /* End of SoC Level DTS fixup file */