diff --git a/drivers/espi/espi_npcx.c b/drivers/espi/espi_npcx.c
index 3d3f2c71073..c6f7490db75 100644
--- a/drivers/espi/espi_npcx.c
+++ b/drivers/espi/espi_npcx.c
@@ -1329,11 +1329,6 @@ static int espi_npcx_init(const struct device *dev)
 	const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE);
 	int i, ret;
 
-	/* If booter doesn't set the host interface type */
-	if (!NPCX_BOOTER_IS_HIF_TYPE_SET()) {
-		npcx_host_interface_sel(NPCX_HIF_TYPE_ESPI_SHI);
-	}
-
 	if (!device_is_ready(clk_dev)) {
 		LOG_ERR("clock control device not ready");
 		return -ENODEV;
diff --git a/soc/nuvoton/npcx/common/scfg.c b/soc/nuvoton/npcx/common/scfg.c
index fd287ce66e6..6dac027cb2e 100644
--- a/soc/nuvoton/npcx/common/scfg.c
+++ b/soc/nuvoton/npcx/common/scfg.c
@@ -145,6 +145,11 @@ void npcx_dbg_freeze_enable(bool enable)
 /* Pin-control driver registration */
 static int npcx_scfg_init(void)
 {
+	/* If booter doesn't set the host interface type */
+	if (!NPCX_BOOTER_IS_HIF_TYPE_SET()) {
+		npcx_host_interface_sel(NPCX_HIF_TYPE_ESPI_SHI);
+	}
+
 	/* Change all pads whose default functionality isn't IO to GPIO */
 	for (int i = 0; i < ARRAY_SIZE(def_alts); i++) {
 		npcx_pinctrl_alt_sel(&def_alts[i], 0);
diff --git a/subsys/mgmt/ec_host_cmd/backends/ec_host_cmd_backend_shi_npcx.c b/subsys/mgmt/ec_host_cmd/backends/ec_host_cmd_backend_shi_npcx.c
index a5bb9adadde..e30de1295f9 100644
--- a/subsys/mgmt/ec_host_cmd/backends/ec_host_cmd_backend_shi_npcx.c
+++ b/subsys/mgmt/ec_host_cmd/backends/ec_host_cmd_backend_shi_npcx.c
@@ -875,11 +875,6 @@ static int shi_npcx_init_registers(const struct device *dev)
 		return ret;
 	}
 
-	/* If booter doesn't set the host interface type */
-	if (!NPCX_BOOTER_IS_HIF_TYPE_SET()) {
-		npcx_host_interface_sel(NPCX_HIF_TYPE_ESPI_SHI);
-	}
-
 	/*
 	 * SHICFG1 (SHI Configuration 1) setting
 	 * [7] - IWRAP	= 1: Wrap input buffer to the first address