loapic: Expose APIC LVT mask definition

When the local APIC timer driver is configured into the system it needs to
ability to enable/disable the local APIC timer. The definition of the
LVT mask bit was moved into the APIC interrupt driver as part of the
driver reroganization effort. Move the definition to the public header
file.

Change-Id: I8e7f8eab9f39aa17b96079836c182bde6f7b4fd1
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Dirk Brandewie 2015-04-22 10:41:07 -07:00 committed by Anas Nashif
commit 1a159cb3f5
3 changed files with 13 additions and 11 deletions

View file

@ -150,7 +150,6 @@ INCLUDE FILES: loapic.h
#define LOAPIC_REMOTE 0x00004000 /* remote IRR */
#define LOAPIC_EDGE 0x00000000 /* trigger mode: Edge */
#define LOAPIC_LEVEL 0x00008000 /* trigger mode: Level */
#define LOAPIC_MASK 0x00010000 /* mask */
/* Local APIC Spurious-Interrupt Register Bits */
@ -238,27 +237,27 @@ void _loapic_init(void)
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_LINT0) =
(*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_LINT0) &
~(LOAPIC_MODE | LOAPIC_LOW | LOAPIC_LEVEL | LOAPIC_MASK)) |
~(LOAPIC_MODE | LOAPIC_LOW | LOAPIC_LEVEL | LOAPIC_LVT_MASKED)) |
(LOAPIC_EXT | LOAPIC_HIGH | LOAPIC_EDGE);
/* set LINT1: NMI, high-polarity, edge-trigger, not-masked */
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_LINT1) =
(*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_LINT1) &
~(LOAPIC_MODE | LOAPIC_LOW | LOAPIC_LEVEL | LOAPIC_MASK)) |
~(LOAPIC_MODE | LOAPIC_LOW | LOAPIC_LEVEL | LOAPIC_LVT_MASKED)) |
(LOAPIC_NMI | LOAPIC_HIGH | LOAPIC_EDGE);
/* lock the Local APIC interrupts */
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_TIMER) = LOAPIC_MASK;
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_ERROR) = LOAPIC_MASK;
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_TIMER) = LOAPIC_LVT_MASKED;
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_ERROR) = LOAPIC_LVT_MASKED;
if (loApicMaxLvt >= LOAPIC_LVT_P6)
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_PMC) = LOAPIC_MASK;
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_PMC) = LOAPIC_LVT_MASKED;
if (loApicMaxLvt >= LOAPIC_LVT_PENTIUM4)
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_THERMAL) =
LOAPIC_MASK;
LOAPIC_LVT_MASKED;
/* discard a pending interrupt if any */
@ -385,7 +384,7 @@ void _loapic_irq_enable(unsigned int irq /* IRQ number of
/* clear the mask bit in the LVT */
oldLevel = irq_lock();
*pLvt = *pLvt & ~LOAPIC_MASK;
*pLvt = *pLvt & ~LOAPIC_LVT_MASKED;
irq_unlock(oldLevel);
}
@ -415,6 +414,6 @@ void _loapic_irq_disable(unsigned int irq /* IRQ number of the
/* set the mask bit in the LVT */
oldLevel = irq_lock();
*pLvt = *pLvt | LOAPIC_MASK;
*pLvt = *pLvt | LOAPIC_LVT_MASKED;
irq_unlock(oldLevel);
}

View file

@ -179,7 +179,7 @@ static inline void _loApicTimerPeriodic(void)
static inline void _loApicTimerStop(void)
{
*_REG_TIMER |= LOAPIC_MASK;
*_REG_TIMER |= LOAPIC_LVT_MASKED;
}
#endif
@ -198,7 +198,7 @@ static inline void _loApicTimerStop(void)
static inline void _loApicTimerStart(void)
{
*_REG_TIMER &= ~LOAPIC_MASK;
*_REG_TIMER &= ~LOAPIC_LVT_MASKED;
}
#endif

View file

@ -65,6 +65,9 @@ extern "C" {
#define LOAPIC_TIMER_CCR 0x390 /* Timer Current Count Reg */
#define LOAPIC_TIMER_CONFIG 0x3e0 /* Timer Divide Config Reg */
/* Local APIC Vector Table Bits */
#define LOAPIC_LVT_MASKED 0x00010000 /* mask */
#ifdef _ASMLANGUAGE
GTEXT(_loapic_eoi)
#else /* _ASMLANGUAGE */