From 1a14f8b3a690bfc35a9998c4a617b74c438dcd3c Mon Sep 17 00:00:00 2001 From: Vinayak Kariappa Chettimada Date: Mon, 1 Feb 2021 07:21:33 +0530 Subject: [PATCH] Bluetooth: controller: Use DMB instead of DSB Use of Data Memory Barrier instruction with memory clobber in ARM Cortex M architectures is sufficient in the controller implementation to keep compiler data access instructions in order so that an ISR vectoring has memory accesses in the correct order as intented by design. Signed-off-by: Vinayak Kariappa Chettimada --- .../controller/ll_sw/nordic/hal/nrf5/cpu.h | 23 +++++++++++++++---- .../controller/ll_sw/nordic/lll/lll_adv.c | 2 +- .../controller/ll_sw/openisa/lll/lll_adv.c | 4 ++-- 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/cpu.h b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/cpu.h index cad5b4c7534..760789e0f21 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/cpu.h +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/cpu.h @@ -16,12 +16,25 @@ static inline void cpu_sleep(void) #endif } -static inline void cpu_dsb(void) +static inline void cpu_dmb(void) { -#if defined(CONFIG_CPU_CORTEX_M0) || defined(CONFIG_ARCH_POSIX) - /* No need of data synchronization barrier */ -#elif defined(CONFIG_CPU_CORTEX_M4) || defined(CONFIG_CPU_CORTEX_M33) - __DSB(); +#if defined(CONFIG_CPU_CORTEX_M) + /* NOTE: Refer to ARM Cortex-M Programming Guide to Memory Barrier + * Instructions, Section 4.1 Normal access in memories + * + * Implementation: In the Cortex-M processors data transfers are + * carried out in the programmed order. + * + * Hence, there is no need to use a memory barrier instruction between + * each access. Only a compiler memory clobber is sufficient. + */ + __asm__ volatile ("" : : : "memory"); +#elif defined(CONFIG_ARCH_POSIX) + /* FIXME: Add necessary host machine required Data Memory Barrier + * instruction alongwith the below defined compiler memory + * clobber. + */ + __asm__ volatile ("" : : : "memory"); #else #error "Unsupported CPU." #endif diff --git a/subsys/bluetooth/controller/ll_sw/nordic/lll/lll_adv.c b/subsys/bluetooth/controller/ll_sw/nordic/lll/lll_adv.c index f51312a8a4e..dd59df5ed60 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/lll/lll_adv.c +++ b/subsys/bluetooth/controller/ll_sw/nordic/lll/lll_adv.c @@ -223,7 +223,7 @@ struct pdu_adv *lll_adv_pdu_alloc(struct lll_adv_pdu *pdu, uint8_t *idx) uint8_t first_latest; pdu->last = first; - cpu_dsb(); + cpu_dmb(); first_latest = pdu->first; if (first_latest != first) { last++; diff --git a/subsys/bluetooth/controller/ll_sw/openisa/lll/lll_adv.c b/subsys/bluetooth/controller/ll_sw/openisa/lll/lll_adv.c index af6821774e3..db7116cecbb 100644 --- a/subsys/bluetooth/controller/ll_sw/openisa/lll/lll_adv.c +++ b/subsys/bluetooth/controller/ll_sw/openisa/lll/lll_adv.c @@ -214,11 +214,11 @@ struct pdu_adv *lll_adv_pdu_alloc(struct lll_adv_pdu *pdu, uint8_t *idx) pdu->last = first; /* FIXME: Ensure that data is synchronized so that an ISR * vectored, after pdu->last has been updated, does - * access the latest value. __DSB() is used in ARM + * access the latest value. __DMB() is used in ARM * Cortex M4 architectures. Use appropriate * instructions on other platforms. * - * cpu_dsb(); + * cpu_dmb(); */ first_latest = pdu->first; if (first_latest != first) {