From 19c165a119595c69926316323d8f0426beb999f6 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Fri, 8 May 2020 12:29:03 +0100 Subject: [PATCH] drivers: entropy: stm32: Add support for STM32L0 SoCs Add the necessary clock configuration to support STM32L-based SoCs. This change likely adds support for other STM32 SoCs as well since the HSI48 clock is configured for all SoCs that support it (except the STM32L4x) instead of just the STM32G4X. Signed-off-by: Andreas Sandberg --- drivers/entropy/entropy_stm32.c | 12 +++++++++++- soc/arm/st_stm32/stm32l0/soc.h | 4 ++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/entropy/entropy_stm32.c b/drivers/entropy/entropy_stm32.c index 23fd8f5051c..e50f95e8e90 100644 --- a/drivers/entropy/entropy_stm32.c +++ b/drivers/entropy/entropy_stm32.c @@ -176,7 +176,17 @@ static int entropy_stm32_rng_init(struct device *dev) * Linear Feedback Shift Register */ LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_PLLSAI1); -#elif CONFIG_SOC_SERIES_STM32G4X +#elif defined(RCC_HSI48_SUPPORT) + +#if CONFIG_SOC_SERIES_STM32L0X + /* We need SYSCFG to control VREFINT, so make sure it is clocked */ + if (!LL_APB2_GRP1_IsEnabledClock(LL_APB2_GRP1_PERIPH_SYSCFG)) { + return -EINVAL; + } + /* HSI48 requires VREFINT (see RM0376 section 7.2.4). */ + LL_SYSCFG_VREFINT_EnableHSI48(); +#endif /* CONFIG_SOC_SERIES_STM32L0X */ + /* Use the HSI48 for the RNG */ LL_RCC_HSI48_Enable(); while (!LL_RCC_HSI48_IsReady()) { diff --git a/soc/arm/st_stm32/stm32l0/soc.h b/soc/arm/st_stm32/stm32l0/soc.h index 2805d8a0e07..dc60463760e 100644 --- a/soc/arm/st_stm32/stm32l0/soc.h +++ b/soc/arm/st_stm32/stm32l0/soc.h @@ -82,6 +82,10 @@ #include #endif +#ifdef CONFIG_ENTROPY_STM32_RNG +#include +#endif + #endif /* !_ASMLANGUAGE */ #endif /* _STM32L0_SOC_H_ */