gen_isr_tables: New static interrupt build mechanism

This is a new mechanism for generating interrupt tables which will
be useful on many architectures. It replaces the old linker-based
mechanism for creating these tables and has a couple advantages:

 1) It is now possible to use enums as the IRQ line argument to
    IRQ_CONNECT(), which should ease CMSIS integration.
 2) The vector table itself is now generated, which lets us place
    interrupts directly into the vector table without having to
    hard-code them. This is a feature we have long enjoyed on x86
    and will enable 'direct' interrupts.
 3) More code is common, requiring less arch-specific code to
    support.

This patch introduces the common code for this mechanism. Follow-up
patches will enable it on various arches.

Issue: ZEP-1038, ZEP-1165
Change-Id: I9acd6e0de8b438fa9293f2e00563628f7510168a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2017-02-08 17:16:29 -08:00 committed by Anas Nashif
commit 1927b3d020
11 changed files with 457 additions and 2 deletions

View file

@ -40,8 +40,10 @@
#define NOINIT noinit
/* Interrupts */
#define IRQ_VECTOR_TABLE .irq_vector_table
#define IRQ_VECTOR_TABLE .gnu.linkonce.irq_vector_table
#define SW_ISR_TABLE .gnu.linkonce.sw_isr_table
/* Architecture-specific sections */
#if defined(CONFIG_ARM)
#define SCS_SECTION scs
#define SCP_SECTION scp