boards: nucleo_l452re: Use dts for clocks configuration
Convert board to use of device tree for clocks configuration. Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
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2cfae94a86
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3 changed files with 24 additions and 32 deletions
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@ -34,6 +34,28 @@
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};
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};
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};
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};
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&clk_hsi {
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status = "okay";
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};
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&pll {
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div-m = <1>;
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mul-n = <20>;
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div-p = <7>;
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div-q = <2>;
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div-r = <4>;
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clocks = <&clk_hsi>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(80)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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apb2-prescaler = <1>;
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};
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&usart1 {
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&usart1 {
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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current-speed = <115200>;
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current-speed = <115200>;
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@ -2,8 +2,6 @@
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L452XX=y
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CONFIG_SOC_STM32L452XX=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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# enable uart driver
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_SERIAL=y
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@ -20,21 +18,8 @@ CONFIG_PINMUX=y
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# enable GPIO
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# enable GPIO
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CONFIG_GPIO=y
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CONFIG_GPIO=y
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# clock configuration
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# Enable Clocks
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
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# produce 80MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=1
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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# console
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# console
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CONFIG_CONSOLE=y
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CONFIG_CONSOLE=y
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@ -2,8 +2,6 @@
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L452XX=y
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CONFIG_SOC_STM32L452XX=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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# enable uart driver
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_SERIAL=y
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@ -20,21 +18,8 @@ CONFIG_PINMUX=y
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# enable GPIO
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# enable GPIO
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CONFIG_GPIO=y
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CONFIG_GPIO=y
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# clock configuration
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# Enable Clocks
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
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# produce 80MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=1
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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# console
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# console
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CONFIG_CONSOLE=y
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CONFIG_CONSOLE=y
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