diff --git a/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts b/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts
index 604ff059695..ed968e61f0e 100644
--- a/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts
+++ b/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts
@@ -119,6 +119,6 @@ arduino_serial: &uart3 {};
 	};
 };
 
-&usbd1 {
+&usbd2 {
 	status = "ok";
 };
diff --git a/dts/arm/nxp/nxp_rt.dtsi b/dts/arm/nxp/nxp_rt.dtsi
index fd1e9528411..86c1efb7c31 100644
--- a/dts/arm/nxp/nxp_rt.dtsi
+++ b/dts/arm/nxp/nxp_rt.dtsi
@@ -336,7 +336,7 @@
 			label = "TRNG";
 		};
 
-		usbd1: usbd@402E0000 {
+		usbd2: usbd@402e0200 {
 			compatible = "nxp,kinetis-usbd";
 			reg = <0x402E0200 0x1000>;
 			interrupts = <113 1>;
diff --git a/soc/arm/nxp_imx/rt/dts_fixup.h b/soc/arm/nxp_imx/rt/dts_fixup.h
index 9b0b5ef26ac..f79ec1494d3 100644
--- a/soc/arm/nxp_imx/rt/dts_fixup.h
+++ b/soc/arm/nxp_imx/rt/dts_fixup.h
@@ -120,11 +120,11 @@
 #define DT_ENTROPY_MCUX_TRNG_NAME		DT_NXP_KINETIS_TRNG_400CC000_LABEL
 #define CONFIG_ENTROPY_NAME			DT_NXP_KINETIS_TRNG_400CC000_LABEL
 
-#define DT_USBD_MCUX_EHCI_NAME        DT_NXP_KINETIS_USBD_402E0000_LABEL
-#define DT_USBD_MCUX_EHCI_IRQ         DT_NXP_KINETIS_USBD_402E0000_IRQ_USB_OTG
-#define DT_USBD_MCUX_EHCI_IRQ_PRI     DT_NXP_KINETIS_USBD_402E0000_IRQ_0_PRIORITY
-#define DT_USBD_MCUX_EHCI_BASE_ADDRESS    DT_NXP_KINETIS_USBD_402E0000_BASE_ADDRESS
-#define DT_USBD_MCUX_EHCI_NUM_BIDIR_EP    DT_NXP_KINETIS_USBD_402E0000_NUM_BIDIR_ENDPOINTS
-#define DT_USBD_MCUX_EHCI_MAXIMUM_SPEED   DT_NXP_KINETIS_USBD_402E0000_MAXIMUM_SPEED
+#define DT_USBD_MCUX_EHCI_NAME        DT_NXP_KINETIS_USBD_402E0200_LABEL
+#define DT_USBD_MCUX_EHCI_IRQ         DT_NXP_KINETIS_USBD_402E0200_IRQ_USB_OTG
+#define DT_USBD_MCUX_EHCI_IRQ_PRI     DT_NXP_KINETIS_USBD_402E0200_IRQ_0_PRIORITY
+#define DT_USBD_MCUX_EHCI_BASE_ADDRESS    DT_NXP_KINETIS_USBD_402E0200_BASE_ADDRESS
+#define DT_USBD_MCUX_EHCI_NUM_BIDIR_EP    DT_NXP_KINETIS_USBD_402E0200_NUM_BIDIR_ENDPOINTS
+#define DT_USBD_MCUX_EHCI_MAXIMUM_SPEED   DT_NXP_KINETIS_USBD_402E0200_MAXIMUM_SPEED
 
 /* End of SoC Level DTS fixup file */