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drivers: update AMBIQ drivers to use proper base address

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REG_X_BASEADDR will be removed from all hal files.
This forces the use of the peripheral base address
Define MSPI_PORT macro for chip drivers

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
This commit is contained in:
Richard Wheatley 2024-08-09 08:51:34 -05:00 • committed by David Leach
commit 188fc58c72
7 changed files with 9 additions and 8 deletions
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3
drivers/flash/flash_mspi_atxp032.c
View file

@ -826,9 +826,8 @@ static const struct flash_driver_api flash_mspi_atxp032_api = {
#define FLASH_MSPI_ATXP032(n) \
static const struct flash_mspi_atxp032_config flash_mspi_atxp032_config_##n = { \
.port = (DT_REG_ADDR(DT_INST_BUS(n)) - REG_MSPI_BASEADDR) / \
(DT_REG_SIZE(DT_INST_BUS(n)) * 4), \
.mem_size = DT_INST_PROP(n, size) / 8, \
.port = MSPI_PORT(n), \
.flash_param = \
{ \
.write_block_size = NOR_WRITE_SIZE, \

2
drivers/i2c/i2c_ambiq.c
View file

@ -217,7 +217,7 @@ static int i2c_ambiq_init(const struct device *dev)
data->iom_cfg.eInterfaceMode = AM_HAL_IOM_I2C_MODE;
if (AM_HAL_STATUS_SUCCESS !=
am_hal_iom_initialize((config->base - REG_IOM_BASEADDR) / config->size,
am_hal_iom_initialize((config->base - IOM0_BASE) / config->size,
&data->iom_handler)) {
LOG_ERR("Fail to initialize I2C\n");
return -ENXIO;

3
drivers/memc/memc_mspi_aps6404l.c
View file

@ -428,8 +428,7 @@ static int memc_mspi_aps6404l_init(const struct device *psram)
#define MEMC_MSPI_APS6404L(n) \
static const struct memc_mspi_aps6404l_config \
memc_mspi_aps6404l_config_##n = { \
.port = (DT_REG_ADDR(DT_INST_BUS(n)) - REG_MSPI_BASEADDR) / \
(DT_REG_SIZE(DT_INST_BUS(n)) * 4), \
.port = MSPI_PORT(n), \
.mem_size = DT_INST_PROP(n, size) / 8, \
.bus = DEVICE_DT_GET(DT_INST_BUS(n)), \
.dev_id = MSPI_DEVICE_ID_DT_INST(n), \

3
drivers/mspi/mspi_ambiq.h
View file

@ -47,6 +47,9 @@ enum mspi_ambiq_timing_param {
MSPI_AMBIQ_SET_RXDQSDLYEXT = BIT(7),
};
#define MSPI_PORT(n) ((DT_REG_ADDR(DT_INST_BUS(n)) - MSPI0_BASE) / \
(DT_REG_SIZE(DT_INST_BUS(n)) * 4))
#define TIMING_CFG_GET_RX_DUMMY(cfg) \
{ \
mspi_timing_cfg *timing = (mspi_timing_cfg *)cfg; \

2
drivers/mspi/mspi_ambiq_ap3.c
View file

@ -1356,7 +1356,7 @@ static struct mspi_driver_api mspi_ambiq_driver_api = {
#define MSPI_CONFIG(n) \
{ \
.channel_num = (DT_INST_REG_ADDR(n) - REG_MSPI_BASEADDR) / \
.channel_num = (DT_INST_REG_ADDR(n) - MSPI0_BASE) / \
(DT_INST_REG_SIZE(n) * 4), \
.op_mode = MSPI_OP_MODE_CONTROLLER, \
.duplex = MSPI_HALF_DUPLEX, \

2
drivers/spi/spi_ambiq.c
View file

@ -393,7 +393,7 @@ static int spi_ambiq_init(const struct device *dev)
int ret = 0;
if (AM_HAL_STATUS_SUCCESS !=
am_hal_iom_initialize((cfg->base - REG_IOM_BASEADDR) / cfg->size, &data->iom_handler)) {
am_hal_iom_initialize((cfg->base - IOM0_BASE) / cfg->size, &data->iom_handler)) {
LOG_ERR("Fail to initialize SPI\n");
return -ENXIO;
}

2
drivers/spi/spi_ambiq_bleif.c
View file

@ -176,7 +176,7 @@ static int spi_ambiq_init(const struct device *dev)
}
#endif /* CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE */
ret = am_hal_ble_initialize((cfg->base - REG_BLEIF_BASEADDR) / cfg->size, &data->BLEhandle);
ret = am_hal_ble_initialize((cfg->base - BLEIF_BASE) / cfg->size, &data->BLEhandle);
if (ret) {
return ret;
}