drivers: update AMBIQ drivers to use proper base address
REG_X_BASEADDR will be removed from all hal files. This forces the use of the peripheral base address Define MSPI_PORT macro for chip drivers Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
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6710fdf8a1
commit
188fc58c72
7 changed files with 9 additions and 8 deletions
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@ -826,9 +826,8 @@ static const struct flash_driver_api flash_mspi_atxp032_api = {
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#define FLASH_MSPI_ATXP032(n) \
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#define FLASH_MSPI_ATXP032(n) \
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static const struct flash_mspi_atxp032_config flash_mspi_atxp032_config_##n = { \
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static const struct flash_mspi_atxp032_config flash_mspi_atxp032_config_##n = { \
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.port = (DT_REG_ADDR(DT_INST_BUS(n)) - REG_MSPI_BASEADDR) / \
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(DT_REG_SIZE(DT_INST_BUS(n)) * 4), \
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.mem_size = DT_INST_PROP(n, size) / 8, \
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.mem_size = DT_INST_PROP(n, size) / 8, \
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.port = MSPI_PORT(n), \
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.flash_param = \
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.flash_param = \
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{ \
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{ \
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.write_block_size = NOR_WRITE_SIZE, \
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.write_block_size = NOR_WRITE_SIZE, \
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@ -217,7 +217,7 @@ static int i2c_ambiq_init(const struct device *dev)
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data->iom_cfg.eInterfaceMode = AM_HAL_IOM_I2C_MODE;
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data->iom_cfg.eInterfaceMode = AM_HAL_IOM_I2C_MODE;
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if (AM_HAL_STATUS_SUCCESS !=
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if (AM_HAL_STATUS_SUCCESS !=
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am_hal_iom_initialize((config->base - REG_IOM_BASEADDR) / config->size,
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am_hal_iom_initialize((config->base - IOM0_BASE) / config->size,
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&data->iom_handler)) {
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&data->iom_handler)) {
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LOG_ERR("Fail to initialize I2C\n");
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LOG_ERR("Fail to initialize I2C\n");
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return -ENXIO;
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return -ENXIO;
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@ -428,8 +428,7 @@ static int memc_mspi_aps6404l_init(const struct device *psram)
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#define MEMC_MSPI_APS6404L(n) \
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#define MEMC_MSPI_APS6404L(n) \
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static const struct memc_mspi_aps6404l_config \
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static const struct memc_mspi_aps6404l_config \
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memc_mspi_aps6404l_config_##n = { \
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memc_mspi_aps6404l_config_##n = { \
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.port = (DT_REG_ADDR(DT_INST_BUS(n)) - REG_MSPI_BASEADDR) / \
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.port = MSPI_PORT(n), \
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(DT_REG_SIZE(DT_INST_BUS(n)) * 4), \
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.mem_size = DT_INST_PROP(n, size) / 8, \
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.mem_size = DT_INST_PROP(n, size) / 8, \
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.bus = DEVICE_DT_GET(DT_INST_BUS(n)), \
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.bus = DEVICE_DT_GET(DT_INST_BUS(n)), \
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.dev_id = MSPI_DEVICE_ID_DT_INST(n), \
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.dev_id = MSPI_DEVICE_ID_DT_INST(n), \
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@ -47,6 +47,9 @@ enum mspi_ambiq_timing_param {
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MSPI_AMBIQ_SET_RXDQSDLYEXT = BIT(7),
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MSPI_AMBIQ_SET_RXDQSDLYEXT = BIT(7),
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};
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};
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#define MSPI_PORT(n) ((DT_REG_ADDR(DT_INST_BUS(n)) - MSPI0_BASE) / \
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(DT_REG_SIZE(DT_INST_BUS(n)) * 4))
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#define TIMING_CFG_GET_RX_DUMMY(cfg) \
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#define TIMING_CFG_GET_RX_DUMMY(cfg) \
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{ \
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{ \
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mspi_timing_cfg *timing = (mspi_timing_cfg *)cfg; \
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mspi_timing_cfg *timing = (mspi_timing_cfg *)cfg; \
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@ -1356,7 +1356,7 @@ static struct mspi_driver_api mspi_ambiq_driver_api = {
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#define MSPI_CONFIG(n) \
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#define MSPI_CONFIG(n) \
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{ \
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{ \
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.channel_num = (DT_INST_REG_ADDR(n) - REG_MSPI_BASEADDR) / \
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.channel_num = (DT_INST_REG_ADDR(n) - MSPI0_BASE) / \
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(DT_INST_REG_SIZE(n) * 4), \
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(DT_INST_REG_SIZE(n) * 4), \
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.op_mode = MSPI_OP_MODE_CONTROLLER, \
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.op_mode = MSPI_OP_MODE_CONTROLLER, \
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.duplex = MSPI_HALF_DUPLEX, \
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.duplex = MSPI_HALF_DUPLEX, \
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@ -393,7 +393,7 @@ static int spi_ambiq_init(const struct device *dev)
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int ret = 0;
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int ret = 0;
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if (AM_HAL_STATUS_SUCCESS !=
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if (AM_HAL_STATUS_SUCCESS !=
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am_hal_iom_initialize((cfg->base - REG_IOM_BASEADDR) / cfg->size, &data->iom_handler)) {
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am_hal_iom_initialize((cfg->base - IOM0_BASE) / cfg->size, &data->iom_handler)) {
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LOG_ERR("Fail to initialize SPI\n");
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LOG_ERR("Fail to initialize SPI\n");
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return -ENXIO;
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return -ENXIO;
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}
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}
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@ -176,7 +176,7 @@ static int spi_ambiq_init(const struct device *dev)
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}
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}
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#endif /* CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE */
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#endif /* CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE */
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ret = am_hal_ble_initialize((cfg->base - REG_BLEIF_BASEADDR) / cfg->size, &data->BLEhandle);
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ret = am_hal_ble_initialize((cfg->base - BLEIF_BASE) / cfg->size, &data->BLEhandle);
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if (ret) {
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if (ret) {
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return ret;
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return ret;
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}
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}
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