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drivers: watchdog: esp32: Reduce number of seals/unseals

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Jira: ZEP-2556
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This commit is contained in:
Leandro Pereira 2017-08-23 12:53:27 -07:00 • committed by Anas Nashif
commit 1861022148
1 changed files with 5 additions and 9 deletions
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14
drivers/watchdog/wdt_esp32.c
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@ -124,7 +124,6 @@ static void set_interrupt_enabled(bool setting)
{ {
volatile u32_t *intr_enable_reg = (u32_t *)TIMG_INT_ENA_TIMERS_REG(1); volatile u32_t *intr_enable_reg = (u32_t *)TIMG_INT_ENA_TIMERS_REG(1);
wdt_esp32_unseal();
if (setting) { if (setting) {
*intr_enable_reg |= TIMG_WDT_INT_ENA; *intr_enable_reg |= TIMG_WDT_INT_ENA;
@ -135,7 +134,6 @@ static void set_interrupt_enabled(bool setting)
*intr_enable_reg &= ~TIMG_WDT_INT_ENA; *intr_enable_reg &= ~TIMG_WDT_INT_ENA;
irq_disable(CONFIG_WDT_ESP32_IRQ); irq_disable(CONFIG_WDT_ESP32_IRQ);
} }
wdt_esp32_seal();
} }
static int wdt_esp32_set_config(struct device *dev, struct wdt_config *config) static int wdt_esp32_set_config(struct device *dev, struct wdt_config *config)
@ -160,22 +158,19 @@ static int wdt_esp32_set_config(struct device *dev, struct wdt_config *config)
if (config->mode == WDT_MODE_RESET) { if (config->mode == WDT_MODE_RESET) {
/* Warm reset on timeout */ /* Warm reset on timeout */
v |= TIMG_WDT_STG_SEL_RESET_CPU<<TIMG_WDT_STG0_S; v |= TIMG_WDT_STG_SEL_RESET_SYSTEM<<TIMG_WDT_STG0_S;
v |= TIMG_WDT_STG_SEL_OFF<<TIMG_WDT_STG1_S; v |= TIMG_WDT_STG_SEL_OFF<<TIMG_WDT_STG1_S;
/* Disable interrupts for this mode. */ /* Disable interrupts for this mode. */
v &= ~TIMG_WDT_LEVEL_INT_EN; v &= ~(TIMG_WDT_LEVEL_INT_EN | TIMG_WDT_EDGE_INT_EN);
set_interrupt_enabled(false);
} else if (config->mode == WDT_MODE_INTERRUPT_RESET) { } else if (config->mode == WDT_MODE_INTERRUPT_RESET) {
/* Interrupt first, and warm reset if not reloaded */ /* Interrupt first, and warm reset if not reloaded */
v |= TIMG_WDT_STG_SEL_INT<<TIMG_WDT_STG0_S; v |= TIMG_WDT_STG_SEL_INT<<TIMG_WDT_STG0_S;
v |= TIMG_WDT_STG_SEL_RESET_CPU<<TIMG_WDT_STG1_S; v |= TIMG_WDT_STG_SEL_RESET_SYSTEM<<TIMG_WDT_STG1_S;
/* Use level-triggered interrupts. */ /* Use level-triggered interrupts. */
v |= TIMG_WDT_LEVEL_INT_EN; v |= TIMG_WDT_LEVEL_INT_EN;
v &= ~TIMG_WDT_EDGE_INT_EN;
set_interrupt_enabled(true);
} else { } else {
return -EINVAL; return -EINVAL;
} }
@ -183,6 +178,7 @@ static int wdt_esp32_set_config(struct device *dev, struct wdt_config *config)
wdt_esp32_unseal(); wdt_esp32_unseal();
*reg = v; *reg = v;
adjust_timeout(config->timeout & WDT_TIMEOUT_MASK); adjust_timeout(config->timeout & WDT_TIMEOUT_MASK);
set_interrupt_enabled(config->mode == WDT_MODE_INTERRUPT_RESET);
wdt_esp32_seal(); wdt_esp32_seal();
wdt_esp32_reload(dev); wdt_esp32_reload(dev);