boards: arm: add PhyBOARD Polis (i.MX8MM)
Add board definitions to run Zephyr on the M4-Core of the i.MX8M Mini SoC on the PhyBOARD Polis. Signed-off-by: Peter Fecher <p.fecher@phytec.de>
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@ -126,6 +126,7 @@
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/boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen
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/boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen
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/boards/arm/mg100/ @rerickson1
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/boards/arm/mg100/ @rerickson1
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/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
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/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
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/boards/arm/mimx8mm_phyboard_polis @pefech
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/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
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/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
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/boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen
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/boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen
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/boards/arm/mps2_an385/ @fvincenzo
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/boards/arm/mps2_an385/ @fvincenzo
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9
boards/arm/mimx8mm_phyboard_polis/Kconfig.board
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9
boards/arm/mimx8mm_phyboard_polis/Kconfig.board
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# MIMX8MM_PHYBOARD_POLIS board configuration
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# Copyright (c) 2022 PHYTEC Messtechnik GmbH
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_MIMX8MM_PHYBOARD_POLIS
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bool "Phytec Phyboard Polis i.MX8M Mini"
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depends on SOC_SERIES_IMX8MM_M4
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select SOC_PART_NUMBER_MIMX8MM6DVTLZ
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18
boards/arm/mimx8mm_phyboard_polis/Kconfig.defconfig
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18
boards/arm/mimx8mm_phyboard_polis/Kconfig.defconfig
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# MIMX8MM_PHYBOARD_POLIS board defconfig
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#
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# Copyright (c) 2022 PHYTEC Messtechnik GmbH
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_MIMX8MM_PHYBOARD_POLIS
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config BOARD
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default "mimx8mm_phyboard_polis"
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if !XIP
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config FLASH_SIZE
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default 0
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config FLASH_BASE_ADDRESS
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default 0
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endif
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endif # BOARD_MIMX8MM_PHYBOARD_POLIS
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11
boards/arm/mimx8mm_phyboard_polis/board.cmake
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11
boards/arm/mimx8mm_phyboard_polis/board.cmake
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#
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# Copyright (c) 2020, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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board_set_debugger_ifnset(jlink)
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board_set_flasher_ifnset(jlink)
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board_runner_args(jlink "--device=MIMX8MD6_M4")
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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BIN
boards/arm/mimx8mm_phyboard_polis/doc/img/PEB-EVAL-01.jpg
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BIN
boards/arm/mimx8mm_phyboard_polis/doc/img/PEB-EVAL-01.jpg
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Binary file not shown.
After Width: | Height: | Size: 78 KiB |
BIN
boards/arm/mimx8mm_phyboard_polis/doc/img/phyBOARD-Polis.jpg
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BIN
boards/arm/mimx8mm_phyboard_polis/doc/img/phyBOARD-Polis.jpg
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Binary file not shown.
After Width: | Height: | Size: 87 KiB |
342
boards/arm/mimx8mm_phyboard_polis/doc/index.rst
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342
boards/arm/mimx8mm_phyboard_polis/doc/index.rst
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.. _mimx8mm_phyboard_polis:
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PhyBOARD Polis (NXP i.MX8M Mini)
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################################
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Overview
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********
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The phyBOARD-Polis, either a development platform for the
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phyCORE-i.MX 8M Mini/Nano, or a powerful, industry-compatible single-board
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computer for immediate implementation of your product idea. As a development
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platform, the phyBOARD-Polis serves as reference design for your
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customer-specific application and enables parallel development of the software
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and carrier board for the phyCORE-i.MX 8M Mini/Nano.
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As a powerful, industrial single-board computer (SBC), the phyBOARD-Polis is
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equipped with a variety of standard interfaces which are available on standard
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or socket/pin header connectors, while interesting extensions of the
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phyCORE-i.MX 8M Mini/Nano features such as CAN FD, WLAN and an integrated
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TPM chip further extend the range of applications that can be developed with
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the phyCORE-i.MX 8M Mini/Nano.
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- Board features:
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- RAM: 512MB - 4GB (LPDDR4)
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- Storage:
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- 4GB - 128GB eMMC
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- 8MB - 128MB SPI NOR Flash
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- microSD Interfacce
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- 4kB EEPROM
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- Wireless:
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- WiFi: 802.11 b/g/n (ac) 2,4 GHz / 5 GHz
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- BLE 4.2
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- USB:
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- 1x USB2.0 OTG
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- 1x USB2.0
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- Ethernet: 1x 10/100/1000BASE-T
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- Interfaces:
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- 1x RS232 / RS485
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- 2x UART
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- 3x I²C
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- 2x SPI
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- Up to 4x PWM
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- 4x SAI
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- 1x MIPI CSI-2
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- 1x MIPI DSI-2
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- 2x MMC/SD/SDIO
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- 1x PCIe (mini PCIE)
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- LEDs:
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- 1x Status LED (3 Color LED)
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- 1x Debug UART LED
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- Debug
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- JTAG 20-pin connector
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- MicroUSB for UART debug, two COM ports for A53 and M4
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.. image:: img/phyBOARD-Polis.jpg
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:align: center
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:alt: PhyBOARD Polis
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:width: 500
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More information about the board can be found at the
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`PHYTEC website`_.
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Supported Features
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==================
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The Zephyr mimx8mm_phyboard_polis board configuration supports the following
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hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | clock_control |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | GPIO output |
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| | | GPIO input |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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:zephyr_file:`boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig`.
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It is recommended to disable peripherals used by the M4 core on the Linux host.
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Other hardware features are not currently supported with Zephyr on the
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M4-Core.
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Connections and IOs
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===================
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The following components are tested and working correctly.
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UART:
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-----
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Zephyr is configured to use UART4 on the PhyBoard Polis by default to minimize
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problems with the A53-Core because UART4 is only accessible from the M4-Core.
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+---------------+-----------------+-----------------------------------+
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| Board Name | SoM Name | Usage |
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+===============+=================+===================================+
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| RS232/485 | UART1 | RS232 / RS485 with flow-control |
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+---------------+-----------------+-----------------------------------+
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| To WiFi Module| UART2 | UART to WiFi/BLE Module |
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+---------------+-----------------+-----------------------------------+
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| Debug USB(A53)| UART3 | UART Debug Console via USB |
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+---------------+-----------------+-----------------------------------+
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| Debug USB(M4) | UART4 | UART Debug Console via USB |
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+---------------+-----------------+-----------------------------------+
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.. note::
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Please note, that the to UART2 connected Wifi/BLE Module isn't working with
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Zephyr yet.
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.. warning::
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On Boards with the version number 1532.1 UART4 isn't connected to the Debug
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USB. UART4 connects to pin 10(RX) and 12(TX) on the X8 pinheader.
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LEDs:
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-----
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Zephyr has the 3-color status LED configured. The led0 alias (the standard
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Zephyr led) is configured to be the blue led. The LED can also light up in red
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and green.
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GPIO:
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-----
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The pinmuxing for the GPIOs is the standard pinmuxing of the mimx8mm devicetree
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created by NXP. You can find it here:
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:zephyr_file:`dts/arm/nxp/nxp_imx8m_m4.dtsi`.
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The Pinout of the PhyBOARD Polis can be found here:
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`PHYTEC website`_
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System Clock
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============
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The M4 Core is configured to run at a 400 MHz clock speed.
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Programming and Debugging
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*************************
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The i.MX8MM does not have a separate flash for the M4-Core. Because of this
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the A53-Core has to load the program for the M4-Core to the right memory
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address, set the PC and start the processor.
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This can be done with U-Boot or Phytec's Linux BSP via remoteproc.
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Because remoteproc in Phytec's BSP only writes to the TCM memory area,
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everything was tested in this memory area.
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You can read more about remoteproc in Phytec's BSP here: `Remoteproc BSP`_
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These are the memory mapping for A53 and M4:
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+------------+-------------------------+------------------------+-----------------------+----------------------+
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| Region | Cortex-A53 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size |
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+============+=========================+========================+=======================+======================+
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| OCRAM | 0x00900000-0x0093FFFF | 0x20200000-0x2023FFFF | 0x00900000-0x0093FFFF | 256KB |
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+------------+-------------------------+------------------------+-----------------------+----------------------+
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| TCMU | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF | | 128KB |
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+------------+-------------------------+------------------------+-----------------------+----------------------+
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| TCML | 0x007E0000-0x007FFFFF | | 0x1FFE0000-0x1FFFFFFF | 128KB |
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+------------+-------------------------+------------------------+-----------------------+----------------------+
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| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00180000-0x00187FFF | 32KB |
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+------------+-------------------------+------------------------+-----------------------+----------------------+
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For more information about memory mapping see the
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`i.MX 8M Applications Processor Reference Manual`_ (section 2.1.2 and 2.1.3)
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At compilation time you have to choose which RAM will be used. This
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configuration is done in the file ``boards/arm/mimx8mm_evk/mimx8mm_evk.dts``
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with "zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties.
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The available configurations are:
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If you don't want to use the TCM memory area, you can either overwrite the
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boards devicetree in your program or edit the board devicetree located here:
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:zephyr_file:`boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts`
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You also have to set XIP=n or edit the boards defconfig file, if you don't want
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the TCM memory area to be used. You can find the defconf file here:
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:zephyr_file:`boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig`.
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The following configurations are possible for the flash and sram chosen nodes
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to change the used memory area:
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.. code-block:: none
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"zephyr,flash"
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- &tcml_code
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- &ocram_code
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- &ocram_s_code
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"zephyr,sram"
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- &tcmu_sys
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- &ocram_sys
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- &ocram_s_sys
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Starting the M4-Core via U-Boot
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===============================
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Load the compiled zephyr.bin to memory address 0x4800000.
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This should output something like this:
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.. code-block:: console
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u-boot=> tftp 0x48000000 192.168.3.10:zyphr.bin
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Using ethernet@30be0000 device
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TFTP from server 192.168.3.10; our IP address is 192.168.3.11
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Filename 'zepyhr.bin'.
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Load address: 0x48000000
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Loading: ##
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2 KiB/s
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done
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Bytes transferred = 27240 (6a68 hex)
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Because it's not possible to load directly to the TCM memory area you have to
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copy the binaries. The last argument given is the size of the file in bytes,
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you can copy it from the output of the last command.
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.. code-block:: console
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u-boot=> cp.b 0x48000000 0x7e0000 27240
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And finaly starting the M4-Core at the right memory address:
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.. code-block:: console
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u-boot=> bootaux 0x7e0000
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## Starting auxiliary core stack = 0x20003A58, pc = 0x1FFE1905...
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Starting the M4-Core via remoteproc
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===================================
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Copy the zepyhr.elf to ``/lib/firmware`` on the target. Maybe a Zephyr sample
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will be included in a future BSP release.
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.. note::
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In order to use remoteproc you have to add ``imx8mm-phycore-rpmsg.dtbo`` at
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the end of the line in the ``/boot/bootenv.txt``, then reboot the target.
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.. warning::
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Remoteproc only reads firmware files from the ``/lib/firmware`` directory!
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If you try to load a binary from another location unexpected errors will
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occur!
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To load and start a firmware use this commands:
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.. code-block:: console
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target$ echo /lib/firmware/zepyhr.elf > /sys/class/remoteproc/remoteproc0/firmware
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target$ echo start > /sys/class/remoteproc/remoteproc0/state
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[ 90.700611] remoteproc remoteproc0: powering up imx-rproc
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[ 90.706114] remoteproc remoteproc0: Direct firmware load for /lib/firmware/zepyhr.elf failed w2
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[ 90.716571] remoteproc remoteproc0: Falling back to sysfs fallback for: /lib/firmware/zepyhr.elf
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[ 90.739280] remoteproc remoteproc0: Booting fw image /lib/firmware/zepyhr.elf, size 599356
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[ 90.804448] remoteproc remoteproc0: remote processor imx-rproc is now up
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The M4-Core is now started up and running. You can see the output from Zephyr
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on UART4.
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Debugging
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=========
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The PhyBOARD Polis can be debugged using a JTAG Debugger.
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The easiest way to do that is to use a SEGGER JLink Debugger and Phytec's
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``PEB-EVAL-01`` Shield, which can be directly connected to the JLink.
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You can find the JLink Software package here: `JLink Software`_
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.. figure:: img/PEB-EVAL-01.jpg
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:alt: PEB-EVAL-01
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:width: 350
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||||||
|
PEB-EVAL-01
|
||||||
|
|
||||||
|
To debug efficiently you should use multiple terminals:
|
||||||
|
|
||||||
|
(But its also possible to use ``west debug``)
|
||||||
|
|
||||||
|
After connecting everything and building with west use this command while in
|
||||||
|
the directory of the program you build earlier to start a debug server:
|
||||||
|
|
||||||
|
.. code-block:: console
|
||||||
|
|
||||||
|
host$ west debugserver
|
||||||
|
|
||||||
|
West automatically connects via the JLink to the Target. And keeps open a
|
||||||
|
debug server.
|
||||||
|
|
||||||
|
Use another terminal, start gdb, connect to target and load Zephyr on the
|
||||||
|
target:
|
||||||
|
|
||||||
|
.. code-block:: console
|
||||||
|
|
||||||
|
host$ gdb-multiarch build/zephyr/zephyr.elf -tui
|
||||||
|
(gdb) targ rem :2331
|
||||||
|
Remote debugging using :2331
|
||||||
|
0x1ffe0008 in _vector_table ()
|
||||||
|
(gdb) mon halt
|
||||||
|
(gdb) mon reset
|
||||||
|
(gdb) c
|
||||||
|
Continuing.
|
||||||
|
|
||||||
|
The program can be debugged using standard gdb techniques.
|
||||||
|
|
||||||
|
.. _PHYTEC website:
|
||||||
|
https://www.phytec.de/produkte/single-board-computer/phyboard-polis-imx8m-mini/
|
||||||
|
|
||||||
|
.. _PhyBOARD Polis pinout:
|
||||||
|
https://download.phytec.de/Products/phyBOARD-Polis-iMX8M_Mini/TechData/phyCORE-i.MX8M_MINI_Pin_Muxing_Table.A1.xlsx?_ga=2.237582016.1177557183.1660563641-1900651135.1634193918
|
||||||
|
|
||||||
|
.. _Remoteproc BSP:
|
||||||
|
https://wiki.phytec.com/pages/releaseview.action?pageId=472257137#L1002e.A3i.MX8MMini/NanoBSPManual-RunningExamplesfromLinuxusingRemoteproc
|
||||||
|
|
||||||
|
.. _i.MX 8M Applications Processor Reference Manual:
|
||||||
|
https://www.nxp.com/webapp/Download?colCode=IMX8MMRM
|
||||||
|
|
||||||
|
.. _JLink Software:
|
||||||
|
https://www.segger.com/downloads/jlink/
|
|
@ -0,0 +1,49 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2022 PHYTEC Messtechnik GmbH
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <nxp/nxp_imx/mimx8mm6dvtlz-pinctrl.dtsi>
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
uart4_default: uart4_default {
|
||||||
|
group0 {
|
||||||
|
pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>,
|
||||||
|
<&iomuxc_uart4_txd_uart_tx_uart4_tx>;
|
||||||
|
slew-rate = "fast";
|
||||||
|
drive-strength = "40-ohm";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
uart3_default: uart3_default {
|
||||||
|
group0 {
|
||||||
|
pinmux = <&iomuxc_uart3_rxd_uart_rx_uart3_rx>,
|
||||||
|
<&iomuxc_uart3_txd_uart_tx_uart3_tx>;
|
||||||
|
slew-rate = "fast";
|
||||||
|
drive-strength = "40-ohm";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
uart2_default: uart2_default {
|
||||||
|
group0 {
|
||||||
|
pinmux = <&iomuxc_sai3_rxd_uart_cts_b_uart2_rts_b>,
|
||||||
|
<&iomuxc_sai3_rxd_uart_rts_b_uart2_rts_b>,
|
||||||
|
<&iomuxc_sai3_txfs_uart_tx_uart2_rx>,
|
||||||
|
<&iomuxc_sai3_txc_uart_rx_uart2_tx>;
|
||||||
|
slew-rate = "fast";
|
||||||
|
drive-strength = "40-ohm";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
uart1_default: uart1_default {
|
||||||
|
group0 {
|
||||||
|
pinmux = <&iomuxc_sai2_rxfs_uart_rx_uart1_tx>,
|
||||||
|
<&iomuxc_sai2_rxc_uart_rx_uart1_rx>,
|
||||||
|
<&iomuxc_sai2_rxd0_uart_rts_b_uart1_rts_b>,
|
||||||
|
<&iomuxc_sai2_txfs_uart_cts_b_uart1_cts_b>;
|
||||||
|
slew-rate = "fast";
|
||||||
|
drive-strength = "40-ohm";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
93
boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts
Normal file
93
boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts
Normal file
|
@ -0,0 +1,93 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2022 PHYTEC Messtechnik GmbH
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <nxp/nxp_imx8mm_m4.dtsi>
|
||||||
|
#include "mimx8mm_phyboard_polis-pinctrl.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Phyboard Polis NXP i.MX8M Mini";
|
||||||
|
compatible = "nxp,mimx8mm_phyboard_polis";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
uart-4 = &uart4;
|
||||||
|
uart-3 = &uart3;
|
||||||
|
uart-2 = &uart2;
|
||||||
|
uart-1 = &uart1;
|
||||||
|
led0 = &led_blue;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,flash = &tcml_code;
|
||||||
|
zephyr,sram = &tcmu_sys;
|
||||||
|
zephyr,console = &uart4;
|
||||||
|
zephyr,shell-uart = &uart4;
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
|
||||||
|
led_red: led_red {
|
||||||
|
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
led_blue: led_blue {
|
||||||
|
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
led_green: led_green {
|
||||||
|
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
/* RS232 / RS485 pinheader on the board */
|
||||||
|
&uart1 {
|
||||||
|
status = "disabled";
|
||||||
|
pinctrl-0 = <&uart1_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
hw-flow-control;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* UART to bluetooth module / X18 header
|
||||||
|
* Currently there is no driver for the used module
|
||||||
|
*/
|
||||||
|
&uart2 {
|
||||||
|
status = "disabled";
|
||||||
|
pinctrl-0 = <&uart2_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
hw-flow-control;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* UART usually used from A53 Core (1st tty on Debug USB connector */
|
||||||
|
&uart3 {
|
||||||
|
status = "disabled";
|
||||||
|
pinctrl-0 = <&uart3_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
/* UART of the M4 Core (2nd tty on Debug USB connector) */
|
||||||
|
&uart4 {
|
||||||
|
status = "okay";
|
||||||
|
current-speed = <115200>;
|
||||||
|
pinctrl-0 = <&uart4_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* needs to be configured, so the leds don't generate an error,
|
||||||
|
* but does not interfer with the A53-Core
|
||||||
|
*/
|
||||||
|
&gpio1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&mailbox0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
|
@ -0,0 +1,20 @@
|
||||||
|
#
|
||||||
|
# Copyright (c) 2020 PHYTEC Messtechnik GmbH
|
||||||
|
#
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
#
|
||||||
|
|
||||||
|
identifier: mimx8mm_phyboard_polis
|
||||||
|
name: Phyboard Polis i.MX8M Mini
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
ram: 32
|
||||||
|
flash: 32
|
||||||
|
toolchain:
|
||||||
|
- zephyr
|
||||||
|
- gnuarmemb
|
||||||
|
- xtools
|
||||||
|
testing:
|
||||||
|
ignore_tags:
|
||||||
|
- net
|
||||||
|
- bluetooth
|
|
@ -0,0 +1,17 @@
|
||||||
|
#
|
||||||
|
# Copyright (c) 2022 PHYTEC Messtechnik GmbH
|
||||||
|
#
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
#
|
||||||
|
|
||||||
|
CONFIG_SOC_SERIES_IMX8MM_M4=y
|
||||||
|
CONFIG_SOC_MIMX8MM6=y
|
||||||
|
CONFIG_BOARD_MIMX8MM_PHYBOARD_POLIS=y
|
||||||
|
CONFIG_CORTEX_M_SYSTICK=y
|
||||||
|
CONFIG_CLOCK_CONTROL=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
CONFIG_SERIAL=y
|
||||||
|
CONFIG_UART_INTERRUPT_DRIVEN=y
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_PINCTRL=y
|
||||||
|
CONFIG_GPIO=y
|
Loading…
Add table
Add a link
Reference in a new issue