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dts: x86: cleanup memory node

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* Rename DT_SRAM_SIZE to DT_DRAM_SIZE since that is more correct
* Remove mmio-sram compatible since that is not correct for DRAM.
* Rename node label from sram0 to dram0

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-07-22 12:11:56 -05:00 • committed by Carles Cufí
commit 17d5a47fdc
9 changed files with 18 additions and 21 deletions
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4
boards/x86/acrn/acrn.dts
View file

@ -8,7 +8,7 @@
#include <mem.h> #include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_K(8192) #define DT_DRAM_SIZE DT_SIZE_K(8192)
#include <ia32.dtsi> #include <ia32.dtsi>
@ -22,7 +22,7 @@
}; };
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &dram0;
zephyr,console = &uart0; zephyr,console = &uart0;
zephyr,shell-uart = &uart0; zephyr,shell-uart = &uart0;
}; };

4
boards/x86/gpmrb/gpmrb.dts
View file

@ -8,7 +8,7 @@
#include <mem.h> #include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_M(2048) #define DT_DRAM_SIZE DT_SIZE_M(2048)
#include <apollo_lake.dtsi> #include <apollo_lake.dtsi>
@ -17,7 +17,7 @@
compatible = "intel,apollo_lake"; compatible = "intel,apollo_lake";
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &dram0;
zephyr,console = &uart2; zephyr,console = &uart2;
zephyr,shell-uart = &uart2; zephyr,shell-uart = &uart2;
zephyr,bt-uart = &uart1; zephyr,bt-uart = &uart1;

4
boards/x86/minnowboard/minnowboard.dts
View file

@ -4,7 +4,7 @@
#include <mem.h> #include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_M(2048) #define DT_DRAM_SIZE DT_SIZE_M(2048)
#include <atom.dtsi> #include <atom.dtsi>
@ -18,7 +18,7 @@
}; };
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &dram0;
zephyr,console = &uart0; zephyr,console = &uart0;
zephyr,shell-uart = &uart0; zephyr,shell-uart = &uart0;
zephyr,bt-uart = &uart1; zephyr,bt-uart = &uart1;

4
boards/x86/qemu_x86/qemu_x86.dts
View file

@ -4,7 +4,7 @@
#include <mem.h> #include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_K(4096) #define DT_DRAM_SIZE DT_SIZE_K(4096)
#define DT_FLASH_SIZE DT_SIZE_K(4096) #define DT_FLASH_SIZE DT_SIZE_K(4096)
#include <ia32.dtsi> #include <ia32.dtsi>
@ -25,7 +25,7 @@
}; };
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &dram0;
zephyr,flash = &flash0; zephyr,flash = &flash0;
zephyr,console = &uart0; zephyr,console = &uart0;
zephyr,shell-uart = &uart0; zephyr,shell-uart = &uart0;

4
boards/x86/up_squared/up_squared.dts
View file

@ -8,7 +8,7 @@
#include <mem.h> #include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_M(2048) #define DT_DRAM_SIZE DT_SIZE_M(2048)
#include <apollo_lake.dtsi> #include <apollo_lake.dtsi>
@ -17,7 +17,7 @@
compatible = "intel,apollo_lake"; compatible = "intel,apollo_lake";
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &dram0;
zephyr,console = &uart0; zephyr,console = &uart0;
zephyr,shell-uart = &uart0; zephyr,shell-uart = &uart0;
zephyr,bt-uart = &uart1; zephyr,bt-uart = &uart1;

4
boards/x86/up_squared/up_squared_32.dts
View file

@ -8,7 +8,7 @@
#include <mem.h> #include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_M(2048) #define DT_DRAM_SIZE DT_SIZE_M(2048)
#include <apollo_lake.dtsi> #include <apollo_lake.dtsi>
@ -17,7 +17,7 @@
compatible = "intel,apollo_lake"; compatible = "intel,apollo_lake";
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &dram0;
zephyr,console = &uart0; zephyr,console = &uart0;
zephyr,shell-uart = &uart0; zephyr,shell-uart = &uart0;
zephyr,bt-uart = &uart1; zephyr,bt-uart = &uart1;

5
dts/x86/apollo_lake.dtsi
View file

@ -22,10 +22,9 @@
}; };
sram0: memory@0 { dram0: memory@0 {
device_type = "memory"; device_type = "memory";
compatible = "mmio-sram"; reg = <0x0 DT_DRAM_SIZE>;
reg = <0x0 DT_SRAM_SIZE>;
}; };
intc: ioapic@fec00000 { intc: ioapic@fec00000 {

5
dts/x86/atom.dtsi
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@ -19,10 +19,9 @@
}; };
}; };
sram0: memory@0 { dram0: memory@0 {
device_type = "memory"; device_type = "memory";
compatible = "mmio-sram"; reg = <0x0 DT_DRAM_SIZE>;
reg = <0x0 DT_SRAM_SIZE>;
}; };
intc: ioapic@fec00000 { intc: ioapic@fec00000 {

5
dts/x86/ia32.dtsi
View file

@ -27,10 +27,9 @@
#interrupt-cells = <3>; #interrupt-cells = <3>;
}; };
sram0: memory@0 { dram0: memory@0 {
device_type = "memory"; device_type = "memory";
compatible = "mmio-sram"; reg = <0x0 DT_DRAM_SIZE>;
reg = <0x0 DT_SRAM_SIZE>;
}; };
soc { soc {