From 17ae9a768001c0b0dca1884776fa11279537eb8c Mon Sep 17 00:00:00 2001
From: Fabio Baltieri <fabiobaltieri@google.com>
Date: Fri, 15 Sep 2023 09:59:41 +0000
Subject: [PATCH] intc: gic: convert SYS_INIT to DEVICE_DT_INST_DEFINE

Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
---
 drivers/interrupt_controller/intc_gic.c   | 16 ++++++++++++----
 drivers/interrupt_controller/intc_gicv3.c | 10 ++++++----
 2 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/drivers/interrupt_controller/intc_gic.c b/drivers/interrupt_controller/intc_gic.c
index d664288df56..82eda22da27 100644
--- a/drivers/interrupt_controller/intc_gic.c
+++ b/drivers/interrupt_controller/intc_gic.c
@@ -10,7 +10,7 @@
  * NOTE: This driver implements the GICv1 and GICv2 interfaces.
  */
 
-#include <zephyr/init.h>
+#include <zephyr/device.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/devicetree.h>
 #include <zephyr/sw_isr_table.h>
@@ -18,6 +18,14 @@
 #include <zephyr/drivers/interrupt_controller/gic.h>
 #include <zephyr/sys/barrier.h>
 
+#if defined(CONFIG_GIC_V1)
+#define DT_DRV_COMPAT arm_gic_v1
+#elif defined(CONFIG_GIC_V2)
+#define DT_DRV_COMPAT arm_gic_v2
+#else
+#error "Unknown GIC controller compatible for this configuration"
+#endif
+
 static const uint64_t cpu_mpid_list[] = {
 	DT_FOREACH_CHILD_STATUS_OKAY_SEP(DT_PATH(cpus), DT_REG_ADDR, (,))
 };
@@ -253,9 +261,8 @@ static void gic_cpu_init(void)
 /**
  * @brief Initialize the GIC device driver
  */
-int arm_gic_init(void)
+int arm_gic_init(const struct device *dev)
 {
-
 	/* Init of Distributor interface registers */
 	gic_dist_init();
 
@@ -265,7 +272,8 @@ int arm_gic_init(void)
 	return 0;
 }
 
-SYS_INIT(arm_gic_init, PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY);
+DEVICE_DT_INST_DEFINE(0, arm_gic_init, NULL, NULL, NULL,
+		      PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL);
 
 #ifdef CONFIG_SMP
 void arm_gic_secondary_init(void)
diff --git a/drivers/interrupt_controller/intc_gicv3.c b/drivers/interrupt_controller/intc_gicv3.c
index 9c7611ad3c6..e3c25c4d8b8 100644
--- a/drivers/interrupt_controller/intc_gicv3.c
+++ b/drivers/interrupt_controller/intc_gicv3.c
@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr/init.h>
+#include <zephyr/device.h>
 #include <zephyr/kernel.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/sys/__assert.h>
@@ -17,6 +17,8 @@
 
 #include <string.h>
 
+#define DT_DRV_COMPAT arm_gic_v3
+
 /* Redistributor base addresses for each core */
 mem_addr_t gic_rdists[CONFIG_MP_MAX_NUM_CPUS];
 
@@ -596,16 +598,16 @@ static void __arm_gic_init(void)
 	gicv3_cpuif_init();
 }
 
-int arm_gic_init(void)
+int arm_gic_init(const struct device *dev)
 {
-
 	gicv3_dist_init();
 
 	__arm_gic_init();
 
 	return 0;
 }
-SYS_INIT(arm_gic_init, PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY);
+DEVICE_DT_INST_DEFINE(0, arm_gic_init, NULL, NULL, NULL,
+		      PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL);
 
 #ifdef CONFIG_SMP
 void arm_gic_secondary_init(void)