boards: olimex_stm32_p405: Use dts for clocks configuration
Convert board to use of device tree for clocks configuration. Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
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cd1d1b8625
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17a26100ef
2 changed files with 23 additions and 17 deletions
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@ -43,6 +43,28 @@
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};
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(8)>;
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status = "okay";
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};
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&pll {
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div-m = <4>;
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mul-n = <168>;
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div-p = <2>;
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div-q = <7>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(168)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <4>;
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apb2-prescaler = <2>;
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};
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&usart2 {
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pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
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current-speed = <115200>;
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@ -2,8 +2,6 @@
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F405XG=y
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# 168MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
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# Enable MPU
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CONFIG_ARM_MPU=y
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@ -23,21 +21,7 @@ CONFIG_PINMUX=y
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# enable GPIO
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CONFIG_GPIO=y
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# clock configuration
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# Enable Clocks
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CONFIG_CLOCK_CONTROL=y
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# Clock configuration for Cube Clock control driver
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# produce 168MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=168
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=4
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CONFIG_CLOCK_STM32_APB2_PRESCALER=2
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CONFIG_ENTROPY_GENERATOR=y
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