soc: silabs_exx32: Make HFRCO frequency configurable

This commit adds an option to configure the frequency
in Hz for the HFRCO clock source. The default value
for this option is 0 which skips the configuration of the HFRCO.
This feature is supported for efm32gg, efm32jg, efm32pg, efm32fg
and efm32mg SOCs currently.

Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
This commit is contained in:
Pooja Karanjekar 2020-02-05 10:43:43 +01:00 committed by Maureen Helm
commit 173f636426
7 changed files with 35 additions and 2 deletions

View file

@ -164,6 +164,17 @@ config CMU_LFXO_FREQ
Set the external low frequency oscillator frequency in Hz. This should be set by the
board's defconfig.
config CMU_HFRCO_FREQ
int "Internal high frequency RC oscillator frequency"
default 0
depends on SOC_GECKO_HAS_HFRCO_FREQRANGE
help
Set the internal high frequency RC oscillator frequency in Hz. This should be set by the
board's defconfig. Only supported values may be used here. Setting this to 0, skips the
configuration of the high frequency RC oscillator completely. This may be desired, if
the bootloader already configured it properly or the device's default clock source should
be used with it's default configuration.
endif # SOC_GECKO_CMU
config SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
@ -182,4 +193,12 @@ config SOC_GECKO_HAS_ERRATA_RTCC_E201
feature enabled by setting CCV1TOP in RTCC_CTRL fails to wrap the counter
when RTCC_CNT is equal to RTCC_CC1_CCV, as intended."
config SOC_GECKO_HAS_HFRCO_FREQRANGE
bool
help
If enabled, indicates that configuration of HFRCO frequency for this SOC is supported
via FREQRANGE field. This is supported for e.g. efr32fg1p, efr32mg12p series.
If disabled, indicates that configuration of HFRCO frequency for corresponding SOC
is not supported via this field. This is the case for e.g. efm32hg, efm32wg series.
endif # SOC_FAMILY_EXX32

View file

@ -60,9 +60,18 @@ static ALWAYS_INLINE void clock_init(void)
CMU_OscillatorEnable(cmuOsc_HFRCO, false, false);
#elif (defined CONFIG_CMU_HFCLK_HFRCO)
/*
* This is the default clock, the controller starts with, so nothing to
* do here.
* This is the default clock, the controller starts with
*/
#ifdef CONFIG_SOC_GECKO_HAS_HFRCO_FREQRANGE
if (CONFIG_CMU_HFRCO_FREQ) {
/* Setting system HFRCO frequency */
CMU_HFRCOBandSet(CONFIG_CMU_HFRCO_FREQ);
/* Using HFRCO as high frequency clock, HFCLK */
CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFRCO);
}
#endif
#else
#error "Unsupported clock source for HFCLK selected"
#endif

View file

@ -15,6 +15,7 @@ config SOC_SERIES_EFM32GG11B
select HAS_SYS_POWER_STATE_SLEEP_2
select HAS_SYS_POWER_STATE_SLEEP_3
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_EMU
select SOC_GECKO_GPIO

View file

@ -14,6 +14,7 @@ config SOC_SERIES_EFM32JG12B
select HAS_SYS_POWER_STATE_SLEEP_2
select HAS_SYS_POWER_STATE_SLEEP_3
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_EMU
select SOC_GECKO_GPIO

View file

@ -16,6 +16,7 @@ config SOC_SERIES_EFM32PG12B
select HAS_SYS_POWER_STATE_SLEEP_2
select HAS_SYS_POWER_STATE_SLEEP_3
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_EMU
select SOC_GECKO_GPIO

View file

@ -16,6 +16,7 @@ config SOC_SERIES_EFR32FG1P
select HAS_SYS_POWER_STATE_SLEEP_2
select HAS_SYS_POWER_STATE_SLEEP_3
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_GPIO
select SOC_GECKO_HAS_ERRATA_RTCC_E201

View file

@ -17,6 +17,7 @@ config SOC_SERIES_EFR32MG12P
select HAS_SYS_POWER_STATE_SLEEP_2
select HAS_SYS_POWER_STATE_SLEEP_3
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_EMU
select SOC_GECKO_GPIO