drivers: pinctrl: Add R-Car Gen4 support
Renesas R-Car Gen4 is different from Gen3 regarding pinmux. While Gen3 had only one base address to manage all pins, Gen4 has one set of pinmux registers per GPIO banks. We could expose one pinmux register per GPIO controllers, but that would break potential compatibility with Linux Device tree. Instead create a reg_base array to parse all reg base from device tree and identify proper base address based on the pin definition. This imply to add a pfc_base parameter to most of the pfc_rcar function. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
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12 changed files with 281 additions and 140 deletions
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@ -1,3 +1,4 @@
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# SPDX-License-Identifier: Apache-2.0
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add_subdirectory(${SOC_SERIES})
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zephyr_include_directories(common)
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115
soc/arm/renesas_rcar/common/pinctrl_rcar.h
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115
soc/arm/renesas_rcar/common/pinctrl_rcar.h
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@ -0,0 +1,115 @@
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/*
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* Copyright (c) 2023 IoT.bzh
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#ifndef ZEPHYR_SOC_ARM_RENESAS_RCAR_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_RENESAS_RCAR_COMMON_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>
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#include <stdint.h>
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#include <zephyr/sys/util_macro.h>
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struct rcar_pin_func {
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uint8_t bank:5; /* bank number 0 - 18 */
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uint8_t shift:5; /* bit shift 0 - 28 */
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uint8_t func:4; /* choice from 0x0 to 0xF */
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};
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/** Pull-up, pull-down, or bias disable is requested */
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#define RCAR_PIN_FLAGS_PULL_SET BIT(0)
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/** Performs on/off control of the pull resistors */
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#define RCAR_PIN_FLAGS_PUEN BIT(1)
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/** Select pull-up resistor if set pull-down otherwise */
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#define RCAR_PIN_FLAGS_PUD BIT(2)
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/** Alternate function for the pin is requested */
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#define RCAR_PIN_FLAGS_FUNC_SET BIT(3)
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#define RCAR_PIN_PULL_UP (RCAR_PIN_FLAGS_PULL_SET | RCAR_PIN_FLAGS_PUEN | RCAR_PIN_FLAGS_PUD)
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#define RCAR_PIN_PULL_DOWN (RCAR_PIN_FLAGS_PULL_SET | RCAR_PIN_FLAGS_PUEN)
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#define RCAR_PIN_PULL_DISABLE RCAR_PIN_FLAGS_PULL_SET
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/** Type for R-Car pin. */
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typedef struct pinctrl_soc_pin {
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uint16_t pin;
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struct rcar_pin_func func;
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uint8_t flags;
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uint8_t drive_strength;
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} pinctrl_soc_pin_t;
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#define RCAR_IPSR(node_id) DT_PROP_BY_IDX(node_id, pin, 1)
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#define RCAR_HAS_IPSR(node_id) DT_PROP_HAS_IDX(node_id, pin, 1)
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/* Offsets are defined in dt-bindings pinctrl-rcar-common.h */
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#define RCAR_PIN_FUNC(node_id) \
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{ \
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((RCAR_IPSR(node_id) >> 10U) & 0x1FU), \
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((RCAR_IPSR(node_id) >> 4U) & 0x1FU), \
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((RCAR_IPSR(node_id) & 0xFU)) \
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}
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#define RCAR_PIN_FLAGS(node_id) \
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DT_PROP(node_id, bias_pull_up) * RCAR_PIN_PULL_UP | \
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DT_PROP(node_id, bias_pull_down) * RCAR_PIN_PULL_DOWN | \
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DT_PROP(node_id, bias_disable) * RCAR_PIN_PULL_DISABLE | \
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RCAR_HAS_IPSR(node_id) * RCAR_PIN_FLAGS_FUNC_SET
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#define RCAR_DT_PIN(node_id) \
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{ \
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.pin = DT_PROP_BY_IDX(node_id, pin, 0), \
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.func = COND_CODE_1(RCAR_HAS_IPSR(node_id), \
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(RCAR_PIN_FUNC(node_id)), {0}), \
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.flags = RCAR_PIN_FLAGS(node_id), \
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.drive_strength = \
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COND_CODE_1(DT_NODE_HAS_PROP(node_id, drive_strength), \
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(DT_PROP(node_id, drive_strength)), (0)), \
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},
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param state_prop State property name.
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* @param idx State property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \
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RCAR_DT_PIN(DT_PROP_BY_IDX(node_id, state_prop, idx))
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{ DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) }
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struct pfc_drive_reg_field {
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uint16_t pin;
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uint8_t offset;
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uint8_t size;
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};
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struct pfc_drive_reg {
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uint32_t reg;
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const struct pfc_drive_reg_field fields[8];
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};
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struct pfc_bias_reg {
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uint32_t puen; /** Pull-enable or pull-up control register */
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uint32_t pud; /** Pull-up/down or pull-down control register */
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const uint16_t pins[32];
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};
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/**
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* @brief Utility macro to check if a pin is GPIO capable
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*
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* @param pin
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* @return true if pin is GPIO capable false otherwise
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*/
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#define RCAR_IS_GP_PIN(pin) (pin < PIN_NOGPSR_START)
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#endif /* ZEPHYR_SOC_ARM_RENESAS_RCAR_COMMON_PINCTRL_SOC_H_ */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021 IoT.bzh
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* Copyright (c) 2021-2023 IoT.bzh
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -528,6 +528,7 @@ const struct pfc_bias_reg pfc_bias_regs[] = {
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} },
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{ /* sentinel */ },
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};
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const struct pfc_bias_reg *pfc_rcar_get_bias_regs(void)
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{
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return pfc_bias_regs;
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{
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return pfc_drive_regs;
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}
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int pfc_rcar_get_reg_index(uint8_t pin, uint8_t *reg_index)
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{
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/* There is only one register on Gen 3 */
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*reg_index = 0;
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return 0;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021 IoT.bzh
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* Copyright (c) 2021-2023 IoT.bzh
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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#ifndef ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN3_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN3_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>
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#include <stdint.h>
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#include <zephyr/sys/util_macro.h>
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struct rcar_pin_func {
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uint8_t bank:5; /* bank number 0 - 18 */
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uint8_t shift:5; /* bit shift 0 - 28 */
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uint8_t func:4; /* choice from 0x0 to 0xF */
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};
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/** Pull-up, pull-down, or bias disable is requested */
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#define RCAR_PIN_FLAGS_PULL_SET BIT(0)
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/** Performs on/off control of the pull resistors */
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#define RCAR_PIN_FLAGS_PUEN BIT(1)
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/** Select pull-up resistor if set pull-down otherwise */
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#define RCAR_PIN_FLAGS_PUD BIT(2)
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/** Alternate function for the pin is requested */
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#define RCAR_PIN_FLAGS_FUNC_SET BIT(3)
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#define RCAR_PIN_PULL_UP (RCAR_PIN_FLAGS_PULL_SET | RCAR_PIN_FLAGS_PUEN | RCAR_PIN_FLAGS_PUD)
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#define RCAR_PIN_PULL_DOWN (RCAR_PIN_FLAGS_PULL_SET | RCAR_PIN_FLAGS_PUEN)
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#define RCAR_PIN_PULL_DISABLE RCAR_PIN_FLAGS_PULL_SET
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/** Type for R-Car pin. */
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typedef struct pinctrl_soc_pin {
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uint16_t pin;
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struct rcar_pin_func func;
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uint8_t flags;
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uint8_t drive_strength;
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} pinctrl_soc_pin_t;
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#define RCAR_IPSR(node_id) DT_PROP_BY_IDX(node_id, pin, 1)
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#define RCAR_HAS_IPSR(node_id) DT_PROP_HAS_IDX(node_id, pin, 1)
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/* Offsets are defined in dt-bindings pinctrl-rcar-common.h */
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#define RCAR_PIN_FUNC(node_id) \
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{ \
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((RCAR_IPSR(node_id) >> 10U) & 0x1FU), \
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((RCAR_IPSR(node_id) >> 4U) & 0x1FU), \
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((RCAR_IPSR(node_id) & 0xFU)) \
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}
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#define RCAR_PIN_FLAGS(node_id) \
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DT_PROP(node_id, bias_pull_up) * RCAR_PIN_PULL_UP | \
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DT_PROP(node_id, bias_pull_down) * RCAR_PIN_PULL_DOWN | \
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DT_PROP(node_id, bias_disable) * RCAR_PIN_PULL_DISABLE | \
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RCAR_HAS_IPSR(node_id) * RCAR_PIN_FLAGS_FUNC_SET
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#define RCAR_DT_PIN(node_id) \
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{ \
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.pin = DT_PROP_BY_IDX(node_id, pin, 0), \
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.func = COND_CODE_1(RCAR_HAS_IPSR(node_id), \
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(RCAR_PIN_FUNC(node_id)), (0)), \
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.flags = RCAR_PIN_FLAGS(node_id), \
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.drive_strength = \
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COND_CODE_1(DT_NODE_HAS_PROP(node_id, drive_strength), \
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(DT_PROP(node_id, drive_strength)), (0)), \
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},
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param state_prop State property name.
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* @param idx State property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \
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RCAR_DT_PIN(DT_PROP_BY_IDX(node_id, state_prop, idx))
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{ DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) }
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struct pfc_drive_reg_field {
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uint16_t pin;
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uint8_t offset;
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uint8_t size;
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};
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struct pfc_drive_reg {
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uint32_t reg;
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const struct pfc_drive_reg_field fields[8];
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};
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struct pfc_bias_reg {
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uint32_t puen; /** Pull-enable or pull-up control register */
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uint32_t pud; /** Pull-up/down or pull-down control register */
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const uint16_t pins[32];
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};
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const struct pfc_bias_reg *pfc_rcar_get_bias_regs(void);
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const struct pfc_drive_reg *pfc_rcar_get_drive_regs(void);
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/**
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* @brief Utility macro to check if a pin is GPIO capable
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*
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* @param pin
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* @return true if pin is GPIO capable false otherwise
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*/
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#define RCAR_IS_GP_PIN(pin) (pin < PIN_NOGPSR_START)
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#include <pinctrl_rcar.h>
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#endif /* ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN3_PINCTRL_SOC_H_ */
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2
soc/arm/renesas_rcar/gen4/CMakeLists.txt
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2
soc/arm/renesas_rcar/gen4/CMakeLists.txt
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# Copyright (c) 2023 IoT.bzh
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# SPDX-License-Identifier: Apache-2.0
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12
soc/arm/renesas_rcar/gen4/pinctrl_soc.h
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12
soc/arm/renesas_rcar/gen4/pinctrl_soc.h
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/*
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* Copyright (c) 2023 IoT.bzh
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#ifndef ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN4_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN4_PINCTRL_SOC_H_
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#include <pinctrl_rcar.h>
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#endif /* ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN4_PINCTRL_SOC_H_ */
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