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soc: arm: stm32: remove custom fixed MPU region definition

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We remove the custom fixed MPU region definition from ST
STM32 SoC definitions, as the common fixed MPU
region definition is now used.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2019-12-06 13:25:55 +01:00 • committed by Anas Nashif
commit 16d8a492c6
3 changed files with 0 additions and 127 deletions
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1
soc/arm/st_stm32/common/CMakeLists.txt
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@ -1,6 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_sources_ifdef(CONFIG_ARM_MPU arm_mpu_regions.c)
zephyr_sources(stm32cube_hal.c)
zephyr_linker_sources_ifdef(CONFIG_STM32_CCM SECTIONS ccm.ld)

91
soc/arm/st_stm32/common/arm_mpu_mem_cfg.h
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@ -1,91 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ARM_MPU_MEM_CFG_H_
#define _ARM_MPU_MEM_CFG_H_
#include <soc.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
/* Flash Region Definitions */
#if CONFIG_FLASH_SIZE == 64
#define REGION_FLASH_SIZE REGION_64K
#elif CONFIG_FLASH_SIZE == 128
#define REGION_FLASH_SIZE REGION_128K
#elif CONFIG_FLASH_SIZE == 256
#define REGION_FLASH_SIZE REGION_256K
#elif CONFIG_FLASH_SIZE == 512
#define REGION_FLASH_SIZE REGION_512K
#elif CONFIG_FLASH_SIZE == 1024
#define REGION_FLASH_SIZE REGION_1M
#elif CONFIG_FLASH_SIZE == 1536
#define REGION_FLASH_SIZE REGION_2M /* last 512kB are not mapped */
#elif CONFIG_FLASH_SIZE == 2048
#define REGION_FLASH_SIZE REGION_2M
#else
/* For STM32WBX SoCs, last 212K are resevred for M0 fw */
/* and should not be covered by zephyr MPU. */
/* So map only the first 512K, which is beyond partition 'image-0' */
#if defined(CONFIG_SOC_SERIES_STM32WBX) && (CONFIG_FLASH_SIZE == 812)
#define REGION_FLASH_SIZE REGION_1M
#else
#error "Unsupported configuration"
#endif /* CONFIG_SOC_SERIES_STM32WBX */
#endif
/* SRAM Region Definitions */
#if CONFIG_SRAM_SIZE == 12
#define REGION_SRAM_0_SIZE REGION_8K
#define REGION_SRAM_1_START 0x2000
#define REGION_SRAM_1_SIZE REGION_4K
#elif CONFIG_SRAM_SIZE == 20
#define REGION_SRAM_0_SIZE REGION_16K
#define REGION_SRAM_1_START 0x4000
#define REGION_SRAM_1_SIZE REGION_4K
#elif CONFIG_SRAM_SIZE == 32
#define REGION_SRAM_0_SIZE REGION_32K
#elif CONFIG_SRAM_SIZE == 36
#define REGION_SRAM_0_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 40
#define REGION_SRAM_0_SIZE REGION_32K
#define REGION_SRAM_1_START 0x8000
#define REGION_SRAM_1_SIZE REGION_8K
#elif CONFIG_SRAM_SIZE == 64
#define REGION_SRAM_0_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 96
#define REGION_SRAM_0_SIZE REGION_64K
#define REGION_SRAM_1_START 0x10000
#define REGION_SRAM_1_SIZE REGION_32K
#elif CONFIG_SRAM_SIZE == 128
#define REGION_SRAM_0_SIZE REGION_128K
#elif CONFIG_SRAM_SIZE == 160
#define REGION_SRAM_0_SIZE REGION_128K
#define REGION_SRAM_1_START 0x20000
#define REGION_SRAM_1_SIZE REGION_32K
#elif CONFIG_SRAM_SIZE == 192
#define REGION_SRAM_0_SIZE REGION_128K
#define REGION_SRAM_1_START 0x20000
#define REGION_SRAM_1_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 256
#define REGION_SRAM_0_SIZE REGION_256K
#elif CONFIG_SRAM_SIZE == 320
#define REGION_SRAM_0_SIZE REGION_256K
#define REGION_SRAM_1_START 0x40000
#define REGION_SRAM_1_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 384
#define REGION_SRAM_0_SIZE REGION_256K
#define REGION_SRAM_1_START 0x40000
#define REGION_SRAM_1_SIZE REGION_128K
#elif CONFIG_SRAM_SIZE == 512
#define REGION_SRAM_0_SIZE REGION_512K
#elif CONFIG_SRAM_SIZE == 640
#define REGION_SRAM_0_SIZE REGION_512K
#define REGION_SRAM_1_START 0x80000
#define REGION_SRAM_1_SIZE REGION_128K
#else
#error "Unsupported configuration"
#endif
#endif /* _ARM_MPU_MEM_CFG_H_ */

35
soc/arm/st_stm32/common/arm_mpu_regions.c
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@ -1,35 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
#include "arm_mpu_mem_cfg.h"
/* SoC Private Peripheral Bus */
#define PPB_BASE 0xE0000000
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
/* Region 1 */
MPU_REGION_ENTRY("RAM_0",
CONFIG_SRAM_BASE_ADDRESS,
REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
/* Region 2 */
#ifdef REGION_SRAM_1_SIZE
MPU_REGION_ENTRY("RAM_1",
(CONFIG_SRAM_BASE_ADDRESS + REGION_SRAM_1_START),
REGION_RAM_ATTR(REGION_SRAM_1_SIZE)),
#endif
};
const struct arm_mpu_config mpu_config = {
.num_regions = ARRAY_SIZE(mpu_regions),
.mpu_regions = mpu_regions,
};