drivers: timer: stm32: Adapt SYS_CLOCK_TICKS_PER_SEC

When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.

This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2022-08-23 14:00:49 +02:00 committed by Fabio Baltieri
commit 16c11138d5
6 changed files with 28 additions and 0 deletions

View file

@ -16,4 +16,8 @@ config SPI_STM32_INTERRUPT
config USE_DT_CODE_PARTITION
default y if TRUSTED_EXECUTION_NONSECURE
# LPTIM clocked by LSE, force tick freq to 4096 for tick accuracy
config SYS_CLOCK_TICKS_PER_SEC
default 4096 if STM32_LPTIM_TIMER
endif # BOARD_B_U585I_IOT02A

View file

@ -8,6 +8,10 @@ if BOARD_DISCO_L475_IOT1
config BOARD
default "disco_l475_iot1"
# LPTIM clocked by LSE, force tick freq to 4096 for tick accuracy
config SYS_CLOCK_TICKS_PER_SEC
default 4096 if STM32_LPTIM_TIMER
config SPI_STM32_INTERRUPT
default y
depends on SPI

View file

@ -13,4 +13,8 @@ choice BT_HCI_BUS_TYPE
depends on BT
endchoice
# LPTIM clocked by LSE, force tick freq to 4096 for tick accuracy
config SYS_CLOCK_TICKS_PER_SEC
default 4096 if STM32_LPTIM_TIMER
endif # BOARD_NUCLEO_WB55RG

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@ -8,4 +8,7 @@ if BOARD_NUCLEO_WL55JC
config BOARD
default "nucleo_wl55jc"
config SYS_CLOCK_TICKS_PER_SEC
default 4096 if STM32_LPTIM_TIMER
endif # BOARD_NUCLEO_WL55JC

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@ -8,6 +8,10 @@ if BOARD_STM32L562E_DK
config BOARD
default "stm32l562e_dk"
# LPTIM clocked by LSE, force tick freq to 4096 for tick accuracy
config SYS_CLOCK_TICKS_PER_SEC
default 4096 if STM32_LPTIM_TIMER
if BT
config SPI

View file

@ -298,6 +298,15 @@ static int sys_clock_driver_init(const struct device *dev)
LL_SRDAMR_GRP1_EnableAutonomousClock(LL_SRDAMR_GRP1_PERIPH_LPTIM1AMEN);
#endif
/* For tick accuracy, a specific tick to freq ratio is expected */
/* This check assumes LSI@32KHz or LSE@32768Hz */
if (((lptim_clk[1].bus == STM32_SRC_LSI) &&
(CONFIG_SYS_CLOCK_TICKS_PER_SEC == 4000)) ||
((lptim_clk[1].bus == STM32_SRC_LSE) &&
(CONFIG_SYS_CLOCK_TICKS_PER_SEC == 4096))) {
return -ENOTSUP;
}
/* Enable LPTIM clock source */
clock_control_configure(clk_ctrl, (clock_control_subsys_t *) &lptim_clk[1],
NULL);