From 16770c743eb512f486728579a0f7a1073b09a84d Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 7 Mar 2023 14:18:38 -0500 Subject: [PATCH] riscv: timer: avoid possible tick announcing overflow on boot If for any reason the timer counter didn't hold a value close enough to zero on boot then the cycle delta could overflow and the reported ticks won't be right. Those who really want the hardware uptime where this makes sense (as opposed to Zephyr's uptime) can still rely on sys_clock_cycle_get_64(). Signed-off-by: Nicolas Pitre --- drivers/timer/riscv_machine_timer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/timer/riscv_machine_timer.c b/drivers/timer/riscv_machine_timer.c index 8046ab1557d..1368b85befa 100644 --- a/drivers/timer/riscv_machine_timer.c +++ b/drivers/timer/riscv_machine_timer.c @@ -208,7 +208,9 @@ static int sys_clock_driver_init(const struct device *dev) ARG_UNUSED(dev); IRQ_CONNECT(TIMER_IRQN, 0, timer_isr, NULL, 0); - timer_isr(NULL); /* prime it */ + last_ticks = mtime() / CYC_PER_TICK; + last_count = last_ticks * CYC_PER_TICK; + set_mtimecmp(last_count + CYC_PER_TICK); irq_enable(TIMER_IRQN); return 0; }