arcv2_timer: fix cycle count race
It's possible the timer interrupt could occur when performing the computation, resulting in incorrect values returned. It's still possible for bad values to be returned if the function is called with interrupts locked, but that is only fixable with a second timer source. Issue: ZEP-1546 Change-Id: I16d5b04c3e32377f7249eb4fb1bf2f7c22bd0836 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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1 changed files with 9 additions and 2 deletions
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@ -66,7 +66,7 @@
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/* running total of timer count */
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/* running total of timer count */
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static uint32_t __noinit cycles_per_tick;
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static uint32_t __noinit cycles_per_tick;
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static uint32_t accumulated_cycle_count;
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static volatile uint32_t accumulated_cycle_count;
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#ifdef CONFIG_TICKLESS_IDLE
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#ifdef CONFIG_TICKLESS_IDLE
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static uint32_t __noinit max_system_ticks;
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static uint32_t __noinit max_system_ticks;
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@ -415,7 +415,14 @@ int sys_clock_device_ctrl(struct device *port, uint32_t ctrl_command,
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uint32_t _timer_cycle_get_32(void)
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uint32_t _timer_cycle_get_32(void)
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{
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{
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return (accumulated_cycle_count + timer0_count_register_get());
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uint32_t acc, count;
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do {
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acc = accumulated_cycle_count;
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count = timer0_count_register_get();
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} while (acc != accumulated_cycle_count);
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return acc + count;
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}
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}
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#if defined(CONFIG_SYSTEM_CLOCK_DISABLE)
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#if defined(CONFIG_SYSTEM_CLOCK_DISABLE)
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