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boards: arm: nordic: Add BG96 to RAK5010 board

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Add BG96 in board description
Add W Disable Pin in BG96 descriptor

Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
This commit is contained in:
Guillaume Paquet 2021-01-14 14:45:08 +01:00 • committed by Anas Nashif
commit 143a776657
5 changed files with 46 additions and 13 deletions
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3
boards/arm/rak5010_nrf52840/Kconfig.defconfig
View file

@ -8,6 +8,9 @@ if BOARD_RAK5010_NRF52840
config BOARD config BOARD
default "rak5010_nrf52840" default "rak5010_nrf52840"
config MODEM_QUECTEL_BG9X
default y
if USB if USB
config USB_NRFX config USB_NRFX

37
boards/arm/rak5010_nrf52840/rak5010_nrf52840.dts
View file

@ -12,11 +12,11 @@
compatible = "nordic,rak5010_nrf52840"; compatible = "nordic,rak5010_nrf52840";
chosen { chosen {
zephyr,console = &uart0; zephyr,console = &uart1;
zephyr,shell-uart = &uart0; zephyr,shell-uart = &uart1;
zephyr,uart-mcumgr = &uart0; zephyr,uart-mcumgr = &uart1;
zephyr,bt-mon-uart = &uart0; zephyr,bt-mon-uart = &uart1;
zephyr,bt-c2h-uart = &uart0; zephyr,bt-c2h-uart = &uart1;
zephyr,sram = &sram0; zephyr,sram = &sram0;
zephyr,flash = &flash0; zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition; zephyr,code-partition = &slot0_partition;
@ -54,20 +54,31 @@
&uart0 { &uart0 {
compatible = "nordic,nrf-uart"; compatible = "nordic,nrf-uart";
current-speed = <115200>;
status = "okay"; status = "okay";
tx-pin = <33>; current-speed = <115200>;
rx-pin = <34>; tx-pin = <6>;
rx-pin = <8>;
rts-pin = <7>;
cts-pin = <11>;
/* QUECTEL BG9X */
quectel_bg9x: quectel_bg9x {
compatible = "quectel,bg9x";
label = "quectel,bg9x";
mdm-power-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
mdm-reset-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
mdm-dtr-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
mdm-wdisable-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
}; };
&uart1 { &uart1 {
compatible = "nordic,nrf-uart"; compatible = "nordic,nrf-uart";
status = "okay";
current-speed = <115200>; current-speed = <115200>;
tx-pin = <8>; status = "okay";
rx-pin = <6>; tx-pin = <33>;
rts-pin = <7>; rx-pin = <34>;
cts-pin = <11>;
}; };
&i2c1 { &i2c1 {

6
drivers/modem/quectel-bg9x.c
View file

@ -907,6 +907,12 @@ static void pin_init(void)
{ {
LOG_INF("Setting Modem Pins"); LOG_INF("Setting Modem Pins");
#if DT_INST_NODE_HAS_PROP(0, mdm_wdisable_gpios)
LOG_INF("Deactivate W Disable");
modem_pin_write(&mctx, MDM_WDISABLE, 0);
k_sleep(K_MSEC(250));
#endif
/* NOTE: Per the BG95 document, the Reset pin is internally connected to the /* NOTE: Per the BG95 document, the Reset pin is internally connected to the
* Power key pin. * Power key pin.
*/ */

9
drivers/modem/quectel-bg9x.h
View file

@ -65,6 +65,9 @@ enum mdm_control_pins {
#if DT_INST_NODE_HAS_PROP(0, mdm_dtr_gpios) #if DT_INST_NODE_HAS_PROP(0, mdm_dtr_gpios)
MDM_DTR, MDM_DTR,
#endif #endif
#if DT_INST_NODE_HAS_PROP(0, mdm_wdisable_gpios)
MDM_WDISABLE,
#endif
}; };
/* driver data */ /* driver data */
@ -135,6 +138,12 @@ static struct modem_pin modem_pins[] = {
DT_INST_GPIO_PIN(0, mdm_dtr_gpios), DT_INST_GPIO_PIN(0, mdm_dtr_gpios),
DT_INST_GPIO_FLAGS(0, mdm_dtr_gpios) | GPIO_OUTPUT_LOW), DT_INST_GPIO_FLAGS(0, mdm_dtr_gpios) | GPIO_OUTPUT_LOW),
#endif #endif
#if DT_INST_NODE_HAS_PROP(0, mdm_wdisable_gpios)
/* MDM_WDISABLE */
MODEM_PIN(DT_INST_GPIO_LABEL(0, mdm_wdisable_gpios),
DT_INST_GPIO_PIN(0, mdm_wdisable_gpios),
DT_INST_GPIO_FLAGS(0, mdm_wdisable_gpios) | GPIO_OUTPUT_LOW),
#endif
}; };
#endif /* #ifndef QUECTEL_BG9X_H */ #endif /* #ifndef QUECTEL_BG9X_H */

4
dts/bindings/modem/quectel,bg9x.yaml
View file

@ -22,3 +22,7 @@ properties:
mdm-dtr-gpios: mdm-dtr-gpios:
type: phandle-array type: phandle-array
required: false required: false
mdm-wdisable-gpios:
type: phandle-array
required: false