From 13efe97d6311526a563844205b5a641a2df989d3 Mon Sep 17 00:00:00 2001 From: Maciej Sobkowski Date: Thu, 29 Jun 2023 13:25:21 +0200 Subject: [PATCH] dts: arm: ambiq: apollo4p: instantiate UARTs This commit adds PL011 UART instances to the apollo4p dts. Signed-off-by: Maciej Sobkowski --- dts/arm/ambiq/ambiq_apollo4p.dtsi | 53 +++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/dts/arm/ambiq/ambiq_apollo4p.dtsi b/dts/arm/ambiq/ambiq_apollo4p.dtsi index 02faeb2b47d..0a0116224d2 100644 --- a/dts/arm/ambiq/ambiq_apollo4p.dtsi +++ b/dts/arm/ambiq/ambiq_apollo4p.dtsi @@ -4,6 +4,14 @@ #include / { + clocks { + uartclk: apb-pclk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -27,6 +35,51 @@ }; soc { + pwrcfg: pwrcfg@40021000 { + compatible = "ambiq,pwrctrl"; + reg = <0x40021000 0x400>; + #pwrcfg-cells = <2>; + }; + + uart0: uart@4001c000 { + compatible = "ambiq,uart", "arm,pl011"; + reg = <0x4001c000 0x1000>; + interrupts = <15 0>; + interrupt-names = "UART0"; + status = "disabled"; + clocks = <&uartclk>; + ambiq,pwrcfg = <&pwrcfg 0x4 0x200>; + }; + uart1: uart@4001d000 { + compatible = "ambiq,uart", "arm,pl011"; + reg = <0x4001d000 0x1000>; + interrupts = <16 0>; + interrupt-names = "UART1"; + status = "disabled"; + clocks = <&uartclk>; + ambiq,pwrcfg = <&pwrcfg 0x4 0x400>; + }; + + uart2: uart@4001e000 { + compatible = "ambiq,uart", "arm,pl011"; + reg = <0x4001e000 0x1000>; + interrupts = <17 0>; + interrupt-names = "UART2"; + status = "disabled"; + clocks = <&uartclk>; + ambiq,pwrcfg = <&pwrcfg 0x4 0x800>; + }; + + uart3: uart@4001f000 { + compatible = "ambiq,uart", "arm,pl011"; + reg = <0x4001f000 0x1000>; + interrupts = <18 0>; + interrupt-names = "UART3"; + status = "disabled"; + clocks = <&uartclk>; + ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>; + }; + pinctrl: pin-controller@40010000 { compatible = "ambiq,apollo4-pinctrl"; reg = <0x40010000 0x800>;