soc: riscv: andes_v5: include soc_v5.h

Instead of catch-all soc.h (which was now just being a proxy for
soc_v5.h).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-01-16 15:26:31 +01:00 committed by Fabio Baltieri
commit 13e02a00f0
4 changed files with 6 additions and 6 deletions

View file

@ -10,6 +10,8 @@
* @brief Andes V5 L2 Cache Controller driver
*/
#include "soc_v5.h"
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>

View file

@ -11,7 +11,4 @@
#ifndef __RISCV_ANDES_AE350_SOC_H_
#define __RISCV_ANDES_AE350_SOC_H_
/* Include CSRs available for Andes V5 SoCs */
#include "soc_v5.h"
#endif /* __RISCV_ANDES_AE350_SOC_H_ */

View file

@ -4,11 +4,11 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc_v5.h"
#include <offsets.h>
#include <zephyr/toolchain.h>
#include <soc.h>
#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
/* Exports */

View file

@ -4,8 +4,9 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc_v5.h"
#include <zephyr/toolchain.h>
#include <soc.h>
/* exports */
GTEXT(entry)