drivers: spi: spi_ll_stm32: Add config to manage slave select
Allow the user to use software slave select instead of the hardware pin, in order to free the related GPIO and avoid unwanted SS triggering on the hardware pin. The default SS is still the hardware pin. Signed-off-by: Yaël Boutreux <yael.boutreux@st.com> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
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e3f2add64c
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13ceab4c3b
27 changed files with 85 additions and 1 deletions
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@ -31,16 +31,20 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
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#endif /* CONFIG_I2C_3 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
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@ -35,13 +35,17 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
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#endif /* CONFIG_I2C_2 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
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{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
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{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
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@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
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#endif /* CONFIG_I2C_3 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -39,16 +39,20 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PC12, STM32F4_PINMUX_FUNC_PC12_I2C2_SDA},
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#endif /* CONFIG_I2C_2 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_SPI2_NSS |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK |
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STM32_OSPEEDR_VERY_HIGH_SPEED},
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{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
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@ -23,13 +23,17 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_2 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32L0_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32L0_PINMUX_FUNC_PB12_SPI2_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32L0_PINMUX_FUNC_PB13_SPI2_SCK},
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{STM32_PIN_PB14, STM32L0_PINMUX_FUNC_PB14_SPI2_MISO},
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{STM32_PIN_PB15, STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI},
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@ -23,7 +23,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA},
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#endif /* CONFIG_I2C_2 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -32,13 +32,17 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA},
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#endif /* CONFIG_I2C_2 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
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{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
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{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
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@ -30,13 +30,17 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
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#endif /* CONFIG_PWM_STM32_1 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
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{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
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{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
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{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
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{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
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@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif /* CONFIG_I2C_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
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{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
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{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
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@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif /* CONFIG_I2C_1 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -30,13 +30,17 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
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{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
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{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
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@ -35,7 +35,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
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#endif /* CONFIG_I2C_3 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -34,7 +34,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -34,7 +34,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -43,7 +43,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif /* CONFIG_I2C_1 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -35,7 +35,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
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#endif /* CONFIG_I2C_3 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -57,7 +57,9 @@ static const struct pin_config pinconf[] = {
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{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
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#endif /* CONFIG_PWM_STM32_1 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
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{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
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{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
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@ -57,7 +57,9 @@ static const struct pin_config pinconf[] = {
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{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
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#endif /* CONFIG_PWM_STM32_1 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
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{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
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{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
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@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
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#endif /* CONFIG_PWM_STM32_2 */
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
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{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
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@ -40,7 +40,9 @@ static const struct pin_config pinconf[] = {
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#endif /* CONFIG_PWM_STM32_2 */
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#ifdef CONFIG_SPI_1
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/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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/* SPI1_SCK should output on PA5, but is used for LD2 */
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{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
|
@ -48,14 +50,18 @@ static const struct pin_config pinconf[] = {
|
|||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_2
|
||||
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_3
|
||||
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
|
||||
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
|
||||
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
|
||||
|
|
|
@ -39,7 +39,9 @@ static const struct pin_config pinconf[] = {
|
|||
#endif /* CONFIG_PWM_STM32_2 */
|
||||
#ifdef CONFIG_SPI_1
|
||||
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
/* SPI1_SCK should output on PA5, but is used for LD2 */
|
||||
{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
|
@ -47,14 +49,18 @@ static const struct pin_config pinconf[] = {
|
|||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_2
|
||||
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_3
|
||||
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
|
||||
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
|
||||
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
|
||||
|
|
|
@ -35,13 +35,17 @@ static const struct pin_config pinconf[] = {
|
|||
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA},
|
||||
#endif /* CONFIG_I2C_2 */
|
||||
#ifdef CONFIG_SPI_1
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
|
||||
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
|
||||
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
|
||||
#endif
|
||||
#ifdef CONFIG_SPI_2
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
|
||||
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
|
||||
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
|
||||
|
|
|
@ -38,13 +38,17 @@ static const struct pin_config pinconf[] = {
|
|||
{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
|
||||
#endif /* CONFIG_PWM_STM32_1 */
|
||||
#ifdef CONFIG_SPI_1
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
|
||||
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
|
||||
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_2
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
|
||||
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
|
||||
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
|
||||
|
|
|
@ -31,13 +31,17 @@ static const struct pin_config pinconf[] = {
|
|||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
#endif /* CONFIG_I2C_2 */
|
||||
#ifdef CONFIG_SPI_1
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_2
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
|
|
|
@ -43,7 +43,9 @@ static const struct pin_config pinconf[] = {
|
|||
{STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA},
|
||||
#endif /* CONFIG_I2C_1 */
|
||||
#ifdef CONFIG_SPI_2
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PI1, STM32F7_PINMUX_FUNC_PI1_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
|
|
|
@ -25,4 +25,10 @@ config SPI_STM32_INTERRUPT
|
|||
help
|
||||
Enable Interrupt support for the SPI Driver of STM32 family.
|
||||
|
||||
config SPI_STM32_USE_HW_SS
|
||||
bool "STM32 Hardware Slave Select support"
|
||||
default y
|
||||
help
|
||||
Use Slave Select pin instead of software Slave Select.
|
||||
|
||||
endif # SPI_STM32
|
||||
|
|
|
@ -312,7 +312,7 @@ static int spi_stm32_configure(struct device *dev,
|
|||
LL_SPI_SetMode(spi, LL_SPI_MODE_MASTER);
|
||||
}
|
||||
|
||||
if (config->cs) {
|
||||
if (config->cs || !IS_ENABLED(CONFIG_SPI_STM32_USE_HW_SS)) {
|
||||
LL_SPI_SetNSSMode(spi, LL_SPI_NSS_SOFT);
|
||||
} else {
|
||||
if (config->operation & SPI_OP_MODE_SLAVE) {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue