michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers: spi: spi_ll_stm32: Add config to manage slave select

Browse source 
Allow the user to use software slave select instead of the
hardware pin, in order to free the related GPIO and avoid
unwanted SS triggering on the hardware pin. The default SS
is still the hardware pin.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
Yaël Boutreux 2019-07-24 08:23:52 +02:00 • committed by Kumar Gala
commit 13ceab4c3b
27 changed files with 85 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

4
boards/arm/96b_argonkey/pinmux.c
View file

@ -31,16 +31,20 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif /* CONFIG_I2C_3 */ #endif /* CONFIG_I2C_3 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS | {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK | {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS | {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK | {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},

4
boards/arm/96b_carbon/pinmux.c
View file

@ -35,13 +35,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},

2
boards/arm/96b_neonkey/pinmux.c
View file

@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif /* CONFIG_I2C_3 */ #endif /* CONFIG_I2C_3 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

4
boards/arm/96b_stm32_sensor_mez/pinmux.c
View file

@ -39,16 +39,20 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PC12, STM32F4_PINMUX_FUNC_PC12_I2C2_SDA}, {STM32_PIN_PC12, STM32F4_PINMUX_FUNC_PC12_I2C2_SDA},
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS | {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK | {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_SPI2_NSS | {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK | {STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},

4
boards/arm/b_l072z_lrwan1/pinmux.c
View file

@ -23,13 +23,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_2 */ #endif /* CONFIG_UART_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L0_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L0_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L0_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L0_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32L0_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32L0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L0_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI},

2
boards/arm/mikroe_mini_m4_for_stm32/pinmux.c
View file

@ -23,7 +23,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA},
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

4
boards/arm/nucleo_f030r8/pinmux.c
View file

@ -32,13 +32,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA}, {STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA},
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},

4
boards/arm/nucleo_f103rb/pinmux.c
View file

@ -30,13 +30,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1}, {STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
#endif /* CONFIG_PWM_STM32_1 */ #endif /* CONFIG_PWM_STM32_1 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS}, {STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK}, {STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO}, {STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI}, {STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS}, {STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK}, {STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO}, {STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI}, {STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},

2
boards/arm/nucleo_f302r8/pinmux.c
View file

@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA},
#endif /* CONFIG_I2C_1 */ #endif /* CONFIG_I2C_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},

2
boards/arm/nucleo_f334r8/pinmux.c
View file

@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA},
#endif /* CONFIG_I2C_1 */ #endif /* CONFIG_I2C_1 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},

4
boards/arm/nucleo_f401re/pinmux.c
View file

@ -30,13 +30,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},

2
boards/arm/nucleo_f411re/pinmux.c
View file

@ -35,7 +35,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif /* CONFIG_I2C_3 */ #endif /* CONFIG_I2C_3 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

2
boards/arm/nucleo_f412zg/pinmux.c
View file

@ -34,7 +34,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

2
boards/arm/nucleo_f413zh/pinmux.c
View file

@ -34,7 +34,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

2
boards/arm/nucleo_f429zi/pinmux.c
View file

@ -43,7 +43,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif /* CONFIG_I2C_1 */ #endif /* CONFIG_I2C_1 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

2
boards/arm/nucleo_f446re/pinmux.c
View file

@ -35,7 +35,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif /* CONFIG_I2C_3 */ #endif /* CONFIG_I2C_3 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

2
boards/arm/nucleo_f746zg/pinmux.c
View file

@ -57,7 +57,9 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 }, { STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
#endif /* CONFIG_PWM_STM32_1 */ #endif /* CONFIG_PWM_STM32_1 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS }, { STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK }, { STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO }, { STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI }, { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },

2
boards/arm/nucleo_f756zg/pinmux.c
View file

@ -57,7 +57,9 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 }, { STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
#endif /* CONFIG_PWM_STM32_1 */ #endif /* CONFIG_PWM_STM32_1 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS }, { STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK }, { STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO }, { STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI }, { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },

2
boards/arm/nucleo_l432kc/pinmux.c
View file

@ -31,7 +31,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif /* CONFIG_PWM_STM32_2 */ #endif /* CONFIG_PWM_STM32_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},

6
boards/arm/nucleo_l476rg/pinmux.c
View file

@ -40,7 +40,9 @@ static const struct pin_config pinconf[] = {
#endif /* CONFIG_PWM_STM32_2 */ #endif /* CONFIG_PWM_STM32_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */ /* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
/* SPI1_SCK should output on PA5, but is used for LD2 */ /* SPI1_SCK should output on PA5, but is used for LD2 */
{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK}, {STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
@ -48,14 +50,18 @@ static const struct pin_config pinconf[] = {
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_3 #ifdef CONFIG_SPI_3
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/ /* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK}, {STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO}, {STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI}, {STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},

6
boards/arm/nucleo_l4r5zi/pinmux.c
View file

@ -39,7 +39,9 @@ static const struct pin_config pinconf[] = {
#endif /* CONFIG_PWM_STM32_2 */ #endif /* CONFIG_PWM_STM32_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */ /* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
/* SPI1_SCK should output on PA5, but is used for LD2 */ /* SPI1_SCK should output on PA5, but is used for LD2 */
{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK}, {STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
@ -47,14 +49,18 @@ static const struct pin_config pinconf[] = {
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_3 #ifdef CONFIG_SPI_3
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/ /* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK}, {STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO}, {STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI}, {STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},

4
boards/arm/olimexino_stm32/pinmux.c
View file

@ -35,13 +35,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA},
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE}, {STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK}, {STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO}, {STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI}, {STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif #endif
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE}, {STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK}, {STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO}, {STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI}, {STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},

4
boards/arm/stm32_min_dev/pinmux.c
View file

@ -38,13 +38,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1}, {STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
#endif /* CONFIG_PWM_STM32_1 */ #endif /* CONFIG_PWM_STM32_1 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE}, {STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK}, {STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO}, {STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI}, {STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE}, {STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK}, {STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO}, {STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI}, {STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},

4
boards/arm/stm32f3_disco/pinmux.c
View file

@ -31,13 +31,17 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */ #endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},

2
boards/arm/stm32f746g_disco/pinmux.c
View file

@ -43,7 +43,9 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA},
#endif /* CONFIG_I2C_1 */ #endif /* CONFIG_I2C_1 */
#ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS}, {STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PI1, STM32F7_PINMUX_FUNC_PI1_SPI2_SCK}, {STM32_PIN_PI1, STM32F7_PINMUX_FUNC_PI1_SPI2_SCK},
{STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI},

6
drivers/spi/Kconfig.stm32
View file

@ -25,4 +25,10 @@ config SPI_STM32_INTERRUPT
help help
Enable Interrupt support for the SPI Driver of STM32 family. Enable Interrupt support for the SPI Driver of STM32 family.
config SPI_STM32_USE_HW_SS
bool "STM32 Hardware Slave Select support"
default y
help
Use Slave Select pin instead of software Slave Select.
endif # SPI_STM32 endif # SPI_STM32

2
drivers/spi/spi_ll_stm32.c
View file

@ -312,7 +312,7 @@ static int spi_stm32_configure(struct device *dev,
LL_SPI_SetMode(spi, LL_SPI_MODE_MASTER); LL_SPI_SetMode(spi, LL_SPI_MODE_MASTER);
} }
if (config->cs) { if (config->cs || !IS_ENABLED(CONFIG_SPI_STM32_USE_HW_SS)) {
LL_SPI_SetNSSMode(spi, LL_SPI_NSS_SOFT); LL_SPI_SetNSSMode(spi, LL_SPI_NSS_SOFT);
} else { } else {
if (config->operation & SPI_OP_MODE_SLAVE) { if (config->operation & SPI_OP_MODE_SLAVE) {