michaelh/zephyr
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drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS

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Also added maintainer to the entry

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
This commit is contained in:
Felipe Neves 2021-06-14 11:19:33 -03:00 • committed by Anas Nashif
commit 132ab922a8
11 changed files with 72 additions and 63 deletions
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1
CODEOWNERS
View file

@ -323,6 +323,7 @@
/drivers/timer/stm32_lptim_timer.c @FRASTM
/drivers/timer/leon_gptimer.c @martin-aberg
/drivers/timer/rcar_cmt_timer.c @julien-massot
/drivers/timer/esp32c3_sys_timer.c @uLipe
/drivers/usb/ @jfischer-no
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
/drivers/video/ @loicpoulain

2
boards/riscv/esp32c3_devkitm/CMakeLists.txt
View file

@ -44,6 +44,8 @@ if(CONFIG_BOOTLOADER_ESP_IDF)
${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
endif()
set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
add_dependencies(app EspIdfBootloader EspPartitionTable)
board_finalize_runner_args(esp32 "--esp-flash-bootloader=${espidf_build_dir}/bootloader/bootloader.bin")

4
drivers/timer/esp32c3_sys_timer.c
View file

@ -30,7 +30,9 @@ int sys_clock_driver_init(const struct device *dev)
{
ARG_UNUSED(dev);
esp32c3_rom_intr_matrix_set(0, ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE, SYS_TIMER_CPU_IRQ);
esp32c3_rom_intr_matrix_set(0,
ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE,
SYS_TIMER_CPU_IRQ);
IRQ_CONNECT(SYS_TIMER_CPU_IRQ, 0, sys_timer_isr, NULL, 0);
irq_enable(SYS_TIMER_CPU_IRQ);

10
soc/riscv/esp32c3/soc.c
View file

@ -84,14 +84,18 @@ void __attribute__((section(".iram1"))) __start(void)
#endif
/* Configure the Cache MMU size for instruction and rodata in flash. */
extern uint32_t esp32c3_rom_cache_set_idrom_mmu_size(uint32_t irom_size, uint32_t drom_size);
extern uint32_t esp32c3_rom_cache_set_idrom_mmu_size(uint32_t irom_size,
uint32_t drom_size);
extern int _rodata_reserved_start;
uint32_t rodata_reserved_start_align =
(uint32_t)&_rodata_reserved_start & ~(MMU_PAGE_SIZE - 1);
uint32_t cache_mmu_irom_size =
((rodata_reserved_start_align - SOC_DROM_LOW) / MMU_PAGE_SIZE) * sizeof(uint32_t);
((rodata_reserved_start_align - SOC_DROM_LOW) / MMU_PAGE_SIZE) *
sizeof(uint32_t);
esp32c3_rom_cache_set_idrom_mmu_size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
esp32c3_rom_cache_set_idrom_mmu_size(cache_mmu_irom_size,
CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
/* set global esp32c3's INTC masking level */
esprv_intc_int_set_threshold(1);