soc: silabs: siwx91x: Add siwx91x Power Manager driver

This commit enables the Power Manager driver
support for the siwx91x device.

Signed-off-by: S Mohamed Fiaz <fiaz.mohamed@silabs.com>
This commit is contained in:
S Mohamed Fiaz 2025-05-10 16:13:53 +05:30 committed by Dan Kalowsky
commit 132247e2cd
8 changed files with 185 additions and 5 deletions

View file

@ -3,6 +3,7 @@
set(SISDK_DIR ${ZEPHYR_HAL_SILABS_MODULE_DIR}/simplicity_sdk)
set(WISECONNECT_DIR ${ZEPHYR_HAL_SILABS_MODULE_DIR}/wiseconnect)
set(COMMON_DIR ${ZEPHYR_HAL_SILABS_MODULE_DIR}/simplicity_sdk/platform/common)
# Keep these values sync with
# components/device/silabs/si91x/mcu/core/chip/component/siwg917*.slcc
@ -23,16 +24,25 @@ zephyr_include_directories(
${SISDK_DIR}/platform/common/inc
${SISDK_DIR}/platform/common/config
${SISDK_DIR}/platform/service/mem_pool/inc
${WISECONNECT_DIR}/components/board/silabs/inc
# Wiseconnect do not provide generic RTE_Device_917.h. However, all the boards
# share more-or-less the same definitions. So we could take any of them.
# In addtion, this file is only required for the compilation, but none the
# symbols are normally used by Zephyr (it is required to compile CMSIS API
# which is not not used).
${WISECONNECT_DIR}/components/board/silabs/config/brd4342a
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/config
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/config
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/common/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/rom_driver/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/clock_manager/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/power_manager/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/power_manager/config
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/systemlevel/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_api/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_api/config
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_i2s_config
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/inc
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/cmsis_driver/config
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/cmsis_driver
@ -141,7 +151,7 @@ endif() # CONFIG_BT_SILABS_SIWX91X
if(CONFIG_WISECONNECT_NETWORK_STACK)
zephyr_compile_definitions(
SLI_SI91X_ENABLE_OS
SL_SI91X_SI917_RAM_MEM_CONFIG=1
SL_SI91X_SI917_RAM_MEM_CONFIG=2
SL_WIFI_COMPONENT_INCLUDED # Depite de the name, required for everything
)
zephyr_include_directories(
@ -198,5 +208,49 @@ if(CONFIG_SOC_SILABS_SLEEPTIMER)
)
endif() # CONFIG_SOC_SILABS_SLEEPTIMER
if(CONFIG_SOC_SIWX91X_PM_BACKEND_PMGR)
zephyr_library_sources(
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/common/src/rsi_debug.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/src/rsi_ps_ram_func.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USART.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/cmsis_driver/UDMA.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SAI.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/sl_si91x_m4_ps.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_usart.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_udma_wrapper.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_udma.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sl_si91x_power_manager.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/clock_manager/src/sli_si91x_clock_manager.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_temp_sensor.c
${COMMON_DIR}/src/sl_slist.c
)
zephyr_include_directories(
${COMMON_DIR}/inc
)
zephyr_compile_definitions(
SL_CODE_COMPONENT_POWER_MANAGER=power_manager
SL_SI91X_TICKLESS_MODE
SL_SLEEP_TIMER
SL_SI91X_SI917_RAM_MEM_CONFIG=2
SL_CODE_COMPONENT_CORE=core
DEBUG_ENABLE
DEBUG_UART
SLI_WIRELESS_COMPONENT_PRESENT
)
zephyr_code_relocate(FILES
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/src/rsi_deepsleep_soc.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sl_si91x_power_manager.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/service/sleeptimer/src/sl_sleeptimer_hal_si91x_sysrtc.c
${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sysrtc.c
${SISDK_DIR}/platform/service/sleeptimer/src/sl_sleeptimer.c
${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/ahb_interface/src/rsi_hal_mcu_m4_ram.c
${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/ahb_interface/src/rsi_hal_mcu_m4_rom.c
${ZEPHYR_BASE}/drivers/gpio/*.c
LOCATION RAM
)
endif() # CONFIG_SOC_SIWX91X_PM_BACKEND_PMGR
zephyr_linker_sources(ROM_SECTIONS linker/code_classification_text.ld)
zephyr_linker_sources(RAMFUNC_SECTION linker/code_classification_ramfunc.ld)