dts: psl: npcx: add PSL pads support for ultra-low-power mode.

This CL introduces the Power Switch Logic (PSL) pads which detect the
wake-up events and turn on/off core power supply (VCC1) for ultra-low
-power consumption in npcx device-tree file.

By adding PSL input-pad objects, psl_in1, psl_in2, and so on, into
'psl-in-pads' property and configuring their 'flag' properties, the
related driver will configure them via soc specific functions later.

For example, if PSL input 1 pad that is plan to detect a 'falling edge'
event, this property should be:
	vsby-psl-in-list {
		psl-in-pads = <&psl_in1>;
	};

And the flag property in psl_in1 should change to
	&psl_in1 {
		flag = <NPCX_PSL_FALLING_EDGE>;
	};

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
Mulin Chao 2021-03-03 21:38:12 -08:00 committed by Anas Nashif
commit 12a30dce19
9 changed files with 412 additions and 0 deletions

View file

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/*
* Copyright (c) 2021 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_
/**
* @brief NPCX specific PIN configuration flag
*
* Pin configuration is coded with the following fields
* Power Switch Logic (PSL) [ 0 : 3 ]
* Reserved [ 4 : 31]
*
* Applicable to NPCX7 series.
*/
/*
* Power Switch Logic (PSL) input wake-up mode is sensitive to edge signals.
*
* This is a component flag that should be combined with other
* `NPCX_PSL_ACTIVE_*` flags to produce a meaningful configuration.
*/
#define NPCX_PSL_MODE_EDGE (1 << 0)
/*
* Power Switch Logic (PSL) input wake-up mode is sensitive to logical levels.
*
* This is a component flag that should be combined with other
* `NPCX_PSL_ACTIVE_*` flags to produce a meaningful configuration.
*/
#define NPCX_PSL_MODE_LEVEL (1 << 1)
/*
* The active polarity of Power Switch Logic (PSL) input is high level or
* low-to-high transition.
*
* This is a component flag that should be combined with other
* `NPCX_PSL_MODE_*` flags to produce a meaningful configuration.
*/
#define NPCX_PSL_ACTIVE_HIGH (1 << 2)
/*
* The active polarity of Power Switch Logic (PSL) input is low level or
* high-to-low transition.
*
* This is a component flag that should be combined with other
* `NPCX_PSL_MODE_*` flags to produce a meaningful configuration.
*/
#define NPCX_PSL_ACTIVE_LOW (1 << 3)
/*
* Configures Power Switch Logic (PSL) input in detecting rising edge.
*
* This is used for describing the 'flag' property from PSL input device with
* 'nuvoton,npcx-pslctrl-conf' compatible.
*/
#define NPCX_PSL_RISING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_HIGH)
/*
* Configures Power Switch Logic (PSL) input in detecting falling edge.
*
* This is used for describing the 'flag' property from PSL input device with
* 'nuvoton,npcx-pslctrl-conf' compatible.
*/
#define NPCX_PSL_FALLING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_LOW)
/*
* Configures Power Switch Logic (PSL) input in detecting level high state (has
* logical value '1').
*
* This is used for describing the 'flag' property from PSL input device with
* 'nuvoton,npcx-pslctrl-conf' compatible.
*/
#define NPCX_PSL_LEVEL_HIGH (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_HIGH)
/*
* Configures Power Switch Logic (PSL) input in detecting level low state (has
* logical value '0').
*
* This is used for describing the 'flag' property from PSL input device with
* 'nuvoton,npcx-pslctrl-conf' compatible.
*/
#define NPCX_PSL_LEVEL_LOW (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_LOW)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_ */