drivers: pwm: nrf: Migrate SW PWM Kconfig options to DT
1. Kconfig option Clock prescaler removed. 2. Modified pwm_nrf5_sw.c driver to use DT defines instead of Kconfig, and also use new DT options (timer, ppi/gpiote, etc). 3. Cleanup some code. Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
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2 changed files with 23 additions and 36 deletions
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@ -7,11 +7,21 @@
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#include <soc.h>
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#include "pwm.h"
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#include <nrf_peripherals.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_nrf5_sw);
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/* One compare channel is needed to set the PWM period, hence +1. */
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#if ((DT_NORDIC_NRF_SW_PWM_0_CHANNEL_COUNT + 1) > \
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(_CONCAT( \
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_CONCAT(TIMER, DT_NORDIC_NRF_SW_PWM_0_TIMER_INSTANCE), \
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_CC_NUM)))
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#error "Invalid number of PWM channels configured."
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#endif
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#define PWM_0_MAP_SIZE DT_NORDIC_NRF_SW_PWM_0_CHANNEL_COUNT
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struct pwm_config {
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NRF_TIMER_Type *timer;
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u8_t gpiote_base;
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@ -27,7 +37,7 @@ struct chan_map {
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struct pwm_data {
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u32_t period_cycles;
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struct chan_map map[];
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struct chan_map map[PWM_0_MAP_SIZE];
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};
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static u32_t pwm_period_check(struct pwm_data *data, u8_t map_size,
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@ -234,7 +244,6 @@ static int pwm_nrf5_sw_init(struct device *dev)
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return 0;
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}
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#define PWM_0_MAP_SIZE 3
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/* NOTE: nRF51x BLE controller use HW tIFS hence using only PPI channels 1-6.
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* nRF52x BLE controller implements SW tIFS and uses addition 6 PPI channels.
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* Also, nRF52x requires one additional PPI channel for decryption rate boost.
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@ -244,23 +253,20 @@ static int pwm_nrf5_sw_init(struct device *dev)
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* channels 14-15 are used by BLE controller.
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*/
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static const struct pwm_config pwm_nrf5_sw_0_config = {
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#if defined(CONFIG_SOC_SERIES_NRF51X)
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.timer = NRF_TIMER1,
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.ppi_base = 7,
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#else
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.timer = NRF_TIMER2,
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.ppi_base = 14,
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#endif
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.gpiote_base = 0,
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.timer = _CONCAT(NRF_TIMER, DT_NORDIC_NRF_SW_PWM_0_TIMER_INSTANCE),
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.ppi_base = DT_NORDIC_NRF_SW_PWM_0_PPI_BASE,
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.gpiote_base = DT_NORDIC_NRF_SW_PWM_0_GPIOTE_BASE,
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.map_size = PWM_0_MAP_SIZE,
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.prescaler = CONFIG_PWM_NRF5_SW_0_CLOCK_PRESCALER,
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.prescaler = DT_NORDIC_NRF_SW_PWM_0_CLOCK_PRESCALER,
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};
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#define PWM_0_DATA_SIZE (offsetof(struct pwm_data, map) + \
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sizeof(struct chan_map) * PWM_0_MAP_SIZE)
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static u8_t pwm_nrf5_sw_0_data[PWM_0_DATA_SIZE];
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static struct pwm_data pwm_nrf5_sw_0_data;
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DEVICE_AND_API_INIT(pwm_nrf5_sw_0, CONFIG_PWM_NRF5_SW_0_DEV_NAME,
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pwm_nrf5_sw_init, pwm_nrf5_sw_0_data, &pwm_nrf5_sw_0_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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DEVICE_AND_API_INIT(pwm_nrf5_sw_0,
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CONFIG_PWM_NRF5_SW_0_DEV_NAME,
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pwm_nrf5_sw_init,
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&pwm_nrf5_sw_0_data,
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&pwm_nrf5_sw_0_config,
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POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&pwm_nrf5_sw_drv_api_funcs);
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