From 11e50e750edc702f794a2fc63c3d13becd9e80fe Mon Sep 17 00:00:00 2001 From: Axel Haslam Date: Wed, 31 Jan 2024 14:29:47 +0100 Subject: [PATCH] drivers: usb: stm32: Dont disable ULPI clock on low power When running the cdc_acm demo on a board with an external ULPI phy, the device is unable to enumerate: usb 1-1.8.3.1: new full-speed USB device number 51 using ehci-pci usb 1-1.8.3.1: device descriptor read/64, error -32 usb 1-1.8.3.1: device descriptor read/64, error -32 the console shows: [00:00:00.001,000] cdc_acm_echo: Wait for DTR [00:00:00.007,000] usb_cdc_acm: Device suspended [00:00:00.902,000] usb_cdc_acm: Device resumed [00:00:00.902,000] usb_cdc_acm: from suspend [00:00:25.526,000] usb_cdc_acm: Device suspended By not disabling the ULPI clock in low power, the usb enumeration is working and we can run the cdc_acm demo. While touching this code, add some comments to clarify the macro nesting. Signed-off-by: Axel Haslam --- drivers/usb/device/usb_dc_stm32.c | 8 +++++--- drivers/usb/udc/udc_stm32.c | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/usb/device/usb_dc_stm32.c b/drivers/usb/device/usb_dc_stm32.c index 75ce9442f8e..ad9c6ac520c 100644 --- a/drivers/usb/device/usb_dc_stm32.c +++ b/drivers/usb/device/usb_dc_stm32.c @@ -276,14 +276,16 @@ static int usb_dc_stm32_clock_enable(void) */ LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI); #endif -#else +#else /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_usbphyc) */ +#if !USB_OTG_HS_ULPI_PHY /* Disable ULPI interface (for external high-speed PHY) clock in low * power mode. It is disabled by default in run power mode, no need to * disable it. */ LL_AHB1_GRP1_DisableClockLowPower(LL_AHB1_GRP1_PERIPH_OTGHSULPI); -#endif -#endif +#endif /* USB_OTG_HS_ULPI_PHY */ +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_usbphyc) */ +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_otghs) */ return 0; } diff --git a/drivers/usb/udc/udc_stm32.c b/drivers/usb/udc/udc_stm32.c index e11228619b8..9b912f792c9 100644 --- a/drivers/usb/udc/udc_stm32.c +++ b/drivers/usb/udc/udc_stm32.c @@ -988,14 +988,16 @@ static int priv_clock_enable(void) */ LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI); #endif -#else +#else /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_usbphyc) */ +#if !USB_OTG_HS_ULPI_PHY /* Disable ULPI interface (for external high-speed PHY) clock in low * power mode. It is disabled by default in run power mode, no need to * disable it. */ LL_AHB1_GRP1_DisableClockLowPower(LL_AHB1_GRP1_PERIPH_OTGHSULPI); -#endif -#endif +#endif /* USB_OTG_HS_ULPI_PHY */ +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_usbphyc) */ +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_otghs) */ return 0; }