From 116dd8e527e8a668ae434af0d7e8aa5b06bbf2a8 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Fri, 15 Mar 2019 10:08:15 +0100 Subject: [PATCH] dts: arm: nxp: rt106x: Unified OCRAM node The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram. This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping which is moved to 0x20280000 in order to guarentee global OCRAM memory continuity regardless OCRAM1 size configuration (256KB by default). In default configuration, this gives 768KB (512+256) on-chip ram: 0x20200000 to 0x202BFFFF. OCRAM2: 0x20200000 - 0x2027FFFF OCRAM1(FlexRam): 0x2028FFFF - 0x202BFFFF Add this memory region as a single node in the rt1060 device tree. Note: MPU expects power of two memory region, in case of 768KB, let the MPU configure 1MB instead. Signed-off-by: Loic Poulain --- dts/arm/nxp/nxp_rt1060.dtsi | 16 +++++++++------- soc/arm/nxp_imx/rt/arm_mpu_mem_cfg.h | 4 ++++ 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/dts/arm/nxp/nxp_rt1060.dtsi b/dts/arm/nxp/nxp_rt1060.dtsi index 6f630ccc0e8..c94a1646f88 100644 --- a/dts/arm/nxp/nxp_rt1060.dtsi +++ b/dts/arm/nxp/nxp_rt1060.dtsi @@ -6,11 +6,13 @@ #include -/ { - soc { - ocram1: ocram@20280000 { - compatible = "mmio-sram"; - reg = <0x20280000 0x80000>; - }; - }; +/* i.MX rt1060 has two continuous on-chip RAM, one is part of the + * FlexRAM mapped at 0x20280000 (vs 0x20280000 on rt1050) and is + * configurable (256KB by defaults), the other one is dedicated 512KB + * ram (OCRAM2) mapped at 0x20200000. In order to have a continuous + * region, we describe them in one 768Kb unique node. + */ +&ocram0 { + compatible = "mmio-sram"; + reg = <0x20200000 0xC0000>; }; diff --git a/soc/arm/nxp_imx/rt/arm_mpu_mem_cfg.h b/soc/arm/nxp_imx/rt/arm_mpu_mem_cfg.h index 2e472048a08..25a26ab47bb 100644 --- a/soc/arm/nxp_imx/rt/arm_mpu_mem_cfg.h +++ b/soc/arm/nxp_imx/rt/arm_mpu_mem_cfg.h @@ -41,6 +41,10 @@ #define REGION_SRAM_0_SIZE REGION_128K #elif CONFIG_SRAM_SIZE == 256 #define REGION_SRAM_0_SIZE REGION_256K +#elif CONFIG_SRAM_SIZE == 512 +#define REGION_SRAM_0_SIZE REGION_512K +#elif CONFIG_SRAM_SIZE == 768 +#define REGION_SRAM_0_SIZE REGION_1M /* MPU expects power of two size */ #elif CONFIG_SRAM_SIZE == 32768 #define REGION_SRAM_0_SIZE REGION_32M #else