soc: nxp: rt116x: Fix bus clocking
Reverts bus clock settings. Follows MCUXpresso SDK clock settings, and sets to output of SysPLL2 PFD3 at 198 MHz. Signed-off-by: Derek Snell <derek.snell@nxp.com>
This commit is contained in:
parent
daa6d3a668
commit
11623eb1e4
1 changed files with 3 additions and 3 deletions
|
@ -334,9 +334,9 @@ static ALWAYS_INLINE void clock_init(void)
|
||||||
rootCfg.div = 2;
|
rootCfg.div = 2;
|
||||||
CLOCK_SetRootClock(kCLOCK_Root_Bus, &rootCfg);
|
CLOCK_SetRootClock(kCLOCK_Root_Bus, &rootCfg);
|
||||||
#elif defined(CONFIG_SOC_MIMXRT1166_CM7)
|
#elif defined(CONFIG_SOC_MIMXRT1166_CM7)
|
||||||
/* Configure root bus clock at 200M */
|
/* Configure root bus clock at 198M */
|
||||||
rootCfg.mux = kCLOCK_BUS_ClockRoot_MuxSysPll1Div5;
|
rootCfg.mux = kCLOCK_BUS_ClockRoot_MuxSysPll2Pfd3;
|
||||||
rootCfg.div = 1;
|
rootCfg.div = 2;
|
||||||
CLOCK_SetRootClock(kCLOCK_Root_Bus, &rootCfg);
|
CLOCK_SetRootClock(kCLOCK_Root_Bus, &rootCfg);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue