From 1161fdf2397f2b8034eba56832112930980aca70 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Piotr=20Zi=C4=99cik?= Date: Thu, 11 Apr 2019 14:28:52 +0200 Subject: [PATCH] soc: lpc54xxx: Get CPU clock frequency from DTS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The SoC initialization code used system clock frequency as a CPU clock frequency. This commit corrects that by obtaining the needed value from DTS. Signed-off-by: Piotr Zięcik --- soc/arm/nxp_lpc/lpc54xxx/soc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/soc/arm/nxp_lpc/lpc54xxx/soc.c b/soc/arm/nxp_lpc/lpc54xxx/soc.c index fe1d123a5c2..3b94ce658d7 100644 --- a/soc/arm/nxp_lpc/lpc54xxx/soc.c +++ b/soc/arm/nxp_lpc/lpc54xxx/soc.c @@ -49,10 +49,10 @@ static ALWAYS_INLINE void clkInit(void) CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /* Set FLASH wait states for core */ - CLOCK_SetFLASHAccessCyclesForFreq(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC); + CLOCK_SetFLASHAccessCyclesForFreq(DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY); /* Set up high frequency FRO output to selected frequency */ - CLOCK_SetupFROClocking(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC); + CLOCK_SetupFROClocking(DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY); /* Set up dividers */ /* Set AHBCLKDIV divider to value 1 */