driver: gpio: add initial support for synopsys creg gpio

Add single-register MMIO GPIO driver for complex cases where
only several fields in register belong to GPIO lines and each GPIO
line owns a field with different length and on/off value.

Such CREG GPIOs are used in Synopsys em_starterkit and HSDK boards.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>

drivers/gpio/CMakeLists.txt

@@ -38,6 +38,7 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_PCAL6408A  gpio_pcal6408a.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_EOS_S3     gpio_eos_s3.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_RCAR       gpio_rcar.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_CY8C95XX   gpio_cy8c95xx.c)
+zephyr_library_sources_ifdef(CONFIG_GPIO_SNPS_CREG  gpio_creg_gpio.c)
 
 zephyr_library_sources_ifdef(CONFIG_GPIO_SHELL      gpio_shell.c)
 

drivers/gpio/Kconfig

@@ -91,4 +91,6 @@ source "drivers/gpio/Kconfig.rcar"
 
 source "drivers/gpio/Kconfig.cy8c95xx"
 
+source "drivers/gpio/Kconfig.creg_gpio"
+
 endif # GPIO

drivers/gpio/Kconfig.creg_gpio

@@ -0,0 +1,23 @@
+# Synopsys GPIO via CREG (Control REGisters) driver
+
+# Copyright (c) 2021 Synopsys
+# SPDX-License-Identifier: Apache-2.0
+
+# Workaround for not being able to have commas in macro arguments
+DT_COMPAT_SNPS_CREG_GPIO := snps,creg-gpio
+
+menuconfig GPIO_SNPS_CREG
+	bool "SNPS CREG GPIO"
+	default $(dt_compat_enabled,$(DT_COMPAT_SNPS_CREG_GPIO))
+	help
+	  Enable driver for SNPS CREG GPIO.
+
+if GPIO_SNPS_CREG
+
+config GPIO_SNPS_CREG_INIT_PRIORITY
+	int "Init priority"
+	default 70
+	help
+	  Device driver initialization priority.
+
+endif # GPIO_SNPS_CREG

drivers/gpio/gpio_creg_gpio.c

@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2021 Synopsys
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT snps_creg_gpio
+
+#include <errno.h>
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <drivers/gpio.h>
+#include <drivers/i2c.h>
+#include <sys/byteorder.h>
+#include <sys/util.h>
+
+#include <logging/log.h>
+LOG_MODULE_REGISTER(creg_gpio, CONFIG_GPIO_LOG_LEVEL);
+
+#include "gpio_utils.h"
+
+/** Runtime driver data */
+struct creg_gpio_drv_data {
+	/* gpio_driver_data needs to be first */
+	struct gpio_driver_data common;
+	uint32_t pin_val;
+	uint32_t base_addr;
+};
+
+/** Configuration data */
+struct creg_gpio_config {
+	/* gpio_driver_config needs to be first */
+	struct gpio_driver_config common;
+	uint32_t ngpios;
+	uint8_t bit_per_gpio;
+	uint8_t off_val;
+	uint8_t on_val;
+};
+
+static int pin_config(const struct device *dev,
+		       gpio_pin_t pin,
+		       gpio_flags_t flags)
+{
+	return -ENOTSUP;
+}
+
+static int port_get(const struct device *dev,
+		    gpio_port_value_t *value)
+{
+	const struct creg_gpio_config *cfg = dev->config;
+	struct creg_gpio_drv_data *drv_data = dev->data;
+	uint32_t in = sys_read32(drv_data->base_addr);
+	uint32_t tmp = 0;
+	uint32_t val = 0;
+
+	for (uint8_t i = 0; i < cfg->ngpios; i++) {
+		tmp = (in & cfg->on_val << i * cfg->bit_per_gpio) ? 1 : 0;
+		val |= tmp << i;
+	}
+	*value = drv_data->pin_val = val;
+
+	return 0;
+}
+
+static int port_write(const struct device *dev,
+		      gpio_port_pins_t mask,
+		      gpio_port_value_t value,
+		      gpio_port_value_t toggle)
+{
+	const struct creg_gpio_config *cfg = dev->config;
+	struct creg_gpio_drv_data *drv_data = dev->data;
+	uint32_t *pin_val = &drv_data->pin_val;
+	uint32_t out = 0;
+	uint32_t tmp = 0;
+
+	*pin_val = ((*pin_val & ~mask) | (value & mask)) ^ toggle;
+
+	for (uint8_t i = 0; i < cfg->ngpios; i++) {
+		tmp = (*pin_val & 1 << i) ? cfg->on_val : cfg->off_val;
+		out |= tmp << i * cfg->bit_per_gpio;
+	}
+	sys_write32(out, drv_data->base_addr);
+
+	return 0;
+}
+
+static int port_set_masked(const struct device *dev,
+			   gpio_port_pins_t mask,
+			   gpio_port_value_t value)
+{
+	return port_write(dev, mask, value, 0);
+}
+
+static int port_set_bits(const struct device *dev,
+			 gpio_port_pins_t pins)
+{
+	return port_write(dev, pins, pins, 0);
+}
+
+static int port_clear_bits(const struct device *dev,
+			   gpio_port_pins_t pins)
+{
+	return port_write(dev, pins, 0, 0);
+}
+
+static int port_toggle_bits(const struct device *dev,
+			    gpio_port_pins_t pins)
+{
+	return port_write(dev, 0, 0, pins);
+}
+
+static int pin_interrupt_configure(const struct device *dev,
+				   gpio_pin_t pin,
+				   enum gpio_int_mode mode,
+				   enum gpio_int_trig trig)
+{
+	return -ENOTSUP;
+}
+
+/**
+ * @brief Initialization function of creg_gpio
+ *
+ * @param dev Device struct
+ * @return 0 if successful, failed otherwise.
+ */
+static int creg_gpio_init(const struct device *dev)
+{
+	return 0;
+}
+
+static const struct gpio_driver_api api_table = {
+	.pin_configure = pin_config,
+	.port_get_raw = port_get,
+	.port_set_masked_raw = port_set_masked,
+	.port_set_bits_raw = port_set_bits,
+	.port_clear_bits_raw = port_clear_bits,
+	.port_toggle_bits = port_toggle_bits,
+	.pin_interrupt_configure = pin_interrupt_configure,
+};
+
+static const struct creg_gpio_config creg_gpio_cfg = {
+	.common = {
+		.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(0),
+	},
+	.ngpios = DT_INST_PROP(0, ngpios),
+	.bit_per_gpio = DT_INST_PROP(0, bit_per_gpio),
+	.off_val = DT_INST_PROP(0, off_val),
+	.on_val = DT_INST_PROP(0, on_val),
+};
+
+static struct creg_gpio_drv_data creg_gpio_drvdata = {
+	.base_addr = DT_INST_REG_ADDR(0),
+};
+
+DEVICE_DT_INST_DEFINE(0, creg_gpio_init, NULL,
+		      &creg_gpio_drvdata, &creg_gpio_cfg,
+		      POST_KERNEL, CONFIG_GPIO_SNPS_CREG_INIT_PRIORITY,
+		      &api_table);

dts/bindings/gpio/snps,creg-gpio.yaml

@@ -0,0 +1,34 @@
+# Copyright (c) 2021 Synopsys, Inc. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Synopsys CREG GPIO node
+
+compatible: "snps,creg-gpio"
+
+include: [gpio-controller.yaml, base.yaml]
+
+properties:
+    reg:
+      required: true
+
+    label:
+      required: true
+
+    bit_per_gpio:
+      type: int
+      required: true
+
+    off_val:
+      type: int
+      required: true
+
+    on_val:
+      type: int
+      required: true
+
+    "#gpio-cells":
+      const: 2
+
+gpio-cells:
+  - pin
+  - flags