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Use SoC instead of platform.

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Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.

Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2015-12-17 08:54:35 -05:00
commit 10bb38c186
175 changed files with 220 additions and 232 deletions
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302
arch/x86/soc/quark_se/Kconfig Normal file
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# Kconfig - Quark SE configuration options
#
# Copyright (c) 2015 Intel Corp.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
if SOC_QUARK_SE
config SOC
default quark_se
config PHYS_RAM_ADDR
default 0xA8006400
config PHYS_LOAD_ADDR
default 0x40030000 if XIP
config RAM_SIZE
default 55
config ROM_SIZE
default 144
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32000000
config IOAPIC_NUM_RTES
default 64
config LOAPIC_TIMER_IRQ
default 64
config EOI_FORWARDING_BUG
bool
default y
help
Quark SE LOAPIC has issues with forwarding EOI to the IOAPIC for level
triggered interrupts, this is a SW workaround.
if PINMUX
config PINMUX_BASE
default 0xb0800900
endif
config AIO_DW_COMPARATOR_BASE_ADDR
hex
depends on AIO_DW_COMPARATOR
default 0xb0800300
config ARC_INIT
bool "Quark SE ARC Kickoff"
default n
help
Allows x86 processor to kickoff the ARC slave processor.
config ARC_INIT_DEBUG
bool "Allows the usage of GDB with the ARC processor."
depends on ARC_INIT
default n
help
This option will stop the master processor from boot-strapping
the ARC slave processor. This will allow GDB to halt and
engage the ARC processor to proceed step by step execution.
if GPIO
config GPIO_DW
def_bool y
config GPIO_DW_BOTHEDGES_SUPPORT
def_bool y
config GPIO_DW_CLOCK_GATE
def_bool n
config GPIO_DW_CLOCK_GATE_DRV_NAME
default CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME
config GPIO_DW_0
def_bool y
config GPIO_DW_0_BASE_ADDR
default 0xb0000C00
config GPIO_DW_0_IRQ
default 8
config GPIO_DW_0_BITS
default 32
config GPIO_DW_0_CLOCK_GATE_SUBSYS
default 13
depends on GPIO_DW_CLOCK_GATE
endif
if I2C
config I2C_DW
def_bool y
config I2C_DW_0
def_bool y
config I2C_DW_0_BASE
default 0xb0002800
config I2C_DW_0_NAME
default "I2C0"
config I2C_DW_0_IRQ
default 0
config I2C_DW_1
def_bool y
config I2C_DW_1_BASE
default 0xb0002c00
config I2C_DW_1_NAME
default "I2C1"
config I2C_DW_1_IRQ
default 1
endif
if CLOCK_CONTROL
config CLOCK_CONTROL_QUARK_SE
def_bool y
config CLOCK_CONTROL_QUARK_SE_PERIPHERAL
def_bool y
config CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME
default "clk_peripheral"
config CLOCK_CONTROL_QUARK_SE_EXTERNAL
def_bool y
config CLOCK_CONTROL_QUARK_SE_EXTERNAL_DRV_NAME
default "clk_external"
config CLOCK_CONTROL_QUARK_SE_SENSOR
def_bool y
config CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME
default "clk_sensor"
endif
if SPI
config SPI_DW
def_bool y
config SPI_DW_CLOCK_GATE
def_bool n
config SPI_DW_CLOCK_GATE_DRV_NAME
default CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME
config SPI_DW_PORT_0
def_bool y
config SPI_DW_PORT_0_CLOCK_GATE_SUBSYS
default 14
depends on SPI_DW_CLOCK_GATE
config SPI_DW_PORT_0_REGS
default 0xb0001000
config SPI_DW_PORT_0_IRQ
default 2
config SPI_DW_PORT_1
def_bool y
config SPI_DW_PORT_1_CLOCK_GATE_SUBSYS
default 15
depends on SPI_DW_CLOCK_GATE
config SPI_DW_PORT_1_REGS
default 0xb0001400
config SPI_DW_PORT_1_IRQ
default 3
endif
if WATCHDOG
if WDT_DW
config WDT_DW_CLOCK_GATE
def_bool n
config WDT_DW_CLOCK_GATE_DRV_NAME
default CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME
config WDT_DW_CLOCK_GATE_SUBSYS
default 10
config WDT_DW_BASE_ADDR
default 0xB0000000
config WDT_DW_IRQ
default 12
endif
endif
if RTC
if RTC_DW
config RTC_DW_CLOCK_GATE
def_bool n
config RTC_DW_CLOCK_GATE_DRV_NAME
default CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME
config RTC_DW_CLOCK_GATE_SUBSYS
default 11
config RTC_DW_BASE_ADDR
default 0xB0000400
config RTC_DW_IRQ
default 11
endif
endif
config KERNEL_INIT_PRIORITY_DEFAULT
default 40
config KERNEL_INIT_PRIORITY_DEVICE
default 50
config UART_CONSOLE_PRIORITY
default 60
config IPM_CONSOLE_PRIORITY
default 60
config GPIO_DW_INIT_PRIORITY
default 60
config I2C_INIT_PRIORITY
default 60
if UART_NS16550
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0xB0002000
config UART_NS16550_PORT_0_IRQ
default 5
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 32000000
config UART_NS16550_PORT_0_OPTIONS
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0xB0002400
config UART_NS16550_PORT_1_IRQ
default 6
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 32000000
config UART_NS16550_PORT_1_OPTIONS
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
if UART_CONSOLE
config UART_CONSOLE_ON_DEV_NAME
default "UART_1"
config UART_CONSOLE_IRQ
default 6
config UART_CONSOLE_IRQ_PRI
default 3
endif
if BLUETOOTH_UART
config BLUETOOTH_UART_ON_DEV_NAME
default "UART_1"
config BLUETOOTH_UART_IRQ
default 38
config BLUETOOTH_UART_IRQ_PRI
default 3
endif
if UART_PIPE
config UART_PIPE_ON_DEV_NAME
default "UART_1"
config UART_PIPE_IRQ
default 38
config UART_PIPE_IRQ_PRI
default 3
endif
endif #SOC_QUARK_SE_X86