diff --git a/boards/arm/vmu_rt1170/CMakeLists.txt b/boards/arm/vmu_rt1170/CMakeLists.txt new file mode 100644 index 00000000000..9e03e6cb024 --- /dev/null +++ b/boards/arm/vmu_rt1170/CMakeLists.txt @@ -0,0 +1,26 @@ +# +# Copyright 2023 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_NXP_IMX_RT_BOOT_HEADER) + zephyr_library() + set(RT1170_BOARD_DIR + "${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk/boards/evkmimxrt1170") + if(CONFIG_BOOT_FLEXSPI_NOR) + # Include flash configuration block for RT1170 EVK from NXP's HAL. + # This configuration block may need modification if another flash chip is + # used on your custom board. See NXP AN12238 for more information. + zephyr_compile_definitions(XIP_BOOT_HEADER_ENABLE=1) + zephyr_compile_definitions(BOARD_FLASH_SIZE=CONFIG_FLASH_SIZE*1024) + zephyr_library_sources(flexspi_nor_config.c) + zephyr_library_include_directories(${RT1170_BOARD_DIR}/xip) + endif() +endif() + +if(CONFIG_MCUX_GPT_TIMER) + message(WARNING "You appear to be using the GPT hardware timer. " + "This timer will enable lower power modes, but at the cost of reduced " + "hardware timer resolution") +endif() diff --git a/boards/arm/vmu_rt1170/Kconfig.board b/boards/arm/vmu_rt1170/Kconfig.board new file mode 100644 index 00000000000..53aa20f6800 --- /dev/null +++ b/boards/arm/vmu_rt1170/Kconfig.board @@ -0,0 +1,7 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_VMU_RT1170 + bool "NXP VMU_RT1170" + depends on SOC_MIMXRT1176_CM7 + select SOC_PART_NUMBER_MIMXRT1176DVMAA diff --git a/boards/arm/vmu_rt1170/Kconfig.defconfig b/boards/arm/vmu_rt1170/Kconfig.defconfig new file mode 100644 index 00000000000..1c27b74b23e --- /dev/null +++ b/boards/arm/vmu_rt1170/Kconfig.defconfig @@ -0,0 +1,45 @@ +# VMU_RT1170 board + +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_VMU_RT1170 + +config BOARD + default "vmu_rt1170" if BOARD_VMU_RT1170 + +choice CODE_LOCATION + default CODE_FLEXSPI if BOARD_VMU_RT1170 +endchoice + +if DISK_DRIVERS + +config IMX_USDHC_DAT3_PWR_TOGGLE + default y + +endif # DISK_DRIVERS + +if FLASH + +choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET + default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM if CPU_CORTEX_M7 + default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if CPU_CORTEX_M4 +endchoice + +endif #FLASH + +if NETWORKING + +config NET_L2_ETHERNET + default y if CPU_CORTEX_M7 # No cache memory support is required for driver + +config ETH_MCUX_PHY_RESET + default n + +config ETH_MCUX_RMII_EXT_CLK + default y + +endif # NETWORKING + + +endif # BOARD_VMU_RT1170 diff --git a/boards/arm/vmu_rt1170/board.cmake b/boards/arm/vmu_rt1170/board.cmake new file mode 100644 index 00000000000..0db7f44c768 --- /dev/null +++ b/boards/arm/vmu_rt1170/board.cmake @@ -0,0 +1,17 @@ +# +# Copyright 2023 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_SOC_MIMXRT1176_CM7 OR CONFIG_SECOND_CORE_MCUX) +board_runner_args(pyocd "--target=mimxrt1170_cm7") +board_runner_args(jlink "--device=MIMXRT1176xxxA_M7" "--reset-after-load") +elseif(CONFIG_SOC_MIMXRT1176_CM4) +board_runner_args(pyocd "--target=mimxrt1170_cm4") +# Note: Please use JLINK above V7.50 (Only support run cm4 image when debugging due to default boot core on board is cm7 core) +board_runner_args(jlink "--device=MIMXRT1176xxxA_M4") +endif() + +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) diff --git a/boards/arm/vmu_rt1170/doc/index.rst b/boards/arm/vmu_rt1170/doc/index.rst new file mode 100644 index 00000000000..3514bf15893 --- /dev/null +++ b/boards/arm/vmu_rt1170/doc/index.rst @@ -0,0 +1,289 @@ +.. _VMU RT1170: + +NXP VMU RT1170 +################## + +Overview +******** + +The VMU RT1170 features an i.MX RT1176 dual core MCU with the +Cortex-M7 core at 1 GHz and a Cortex-M4 at 400 MHz. +The i.MX RT1176 MCU offers support over a wide temperature range +and is qualified for consumer, industrial and automotive markets. +The VMU RT1170 is the default VMU for CogniPilot's Cerebri, a +Zephyr RTOS based Autopilot. + +.. image:: vmu_rt1170.jpg + :align: center + :alt: VMU RT1170 + +Hardware +******** + +- MIMXRT1176DVMAA MCU + + - 1GHz Cortex-M7 & 400Mhz Cortex-M4 + - 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4 + +- Memory + + - 512 Mbit Octal Flash + - TF socket for SD card + +- Ethernet + + - 2 wire 100BASE-T1 + +- USB + + - USB 2.0 connector + +- Power + + - Redundant dual picoflex power ports + +- Debug + + - 10 pin debug and shell adapter board to 20 Pin JTAG debugger and USB-C shell + +- Sensor + + - BMI088 6-axis IMU + - BMM150 Magnetometer + - Dual BMP388 Barometer + - Dual ICM-42688 6-axis IMU + - IST8310 3-axis Magnetometer + - U-blox NEO-M8N GNSS module + +- UART JST-GH connectors + +- I2C JST-GH connectors + +- CAN bus JST-GH connectors + +For more information about the MIMXRT1176 SoC and VMU RT1170 board, see +these references: + +- `VMU RT1170 Website`_ +- `VMU RT1170 User Guide`_ +- `VMU RT1170 Schematics`_ +- `i.MX RT1170 Datasheet`_ +- `i.MX RT1170 Reference Manual`_ + +Supported Features +================== + +VMU-RT1170 is a "Vehicle Management Unit" based on the general i.MX RT1170 +family of processors. The VMU RT1170 board configuration supports the +following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+-------------------------------------+ +| CAN | on-chip | flexcan | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| DMA | on-chip | dma | ++-----------+------------+-------------------------------------+ +| GPT | on-chip | gpt | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-------------------------------------+ +| ENET | on-chip | ethernet | ++-----------+------------+-------------------------------------+ +| SAI | on-chip | i2s | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB Device | ++-----------+------------+-------------------------------------+ +| HWINFO | on-chip | Unique device serial number | ++-----------+------------+-------------------------------------+ +| DISPLAY | on-chip | display | ++-----------+------------+-------------------------------------+ +| ACMP | on-chip | analog comparator | ++-----------+------------+-------------------------------------+ +| CAAM RNG | on-chip | entropy | ++-----------+------------+-------------------------------------+ +| FLEXSPI | on-chip | flash programming | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +``boards/arm/vmu_rt1170/vmu_rt1170_defconfig`` + +Other hardware features are not currently supported by the port. + +Connections and I/Os +==================== + +The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers. + ++---------------------------+----------------+------------------+ +| Name | Function | Usage | ++---------------------------+----------------+------------------+ +| WAKEUP | GPIO | SW7 | ++---------------------------+----------------+------------------+ +| GPIO_AD_04 | GPIO | LED | ++---------------------------+----------------+------------------+ +| GPIO_AD_24 | LPUART1_TX | UART Console | ++---------------------------+----------------+------------------+ +| GPIO_AD_25 | LPUART1_RX | UART Console | ++---------------------------+----------------+------------------+ +| GPIO_LPSR_00 | CAN3_TX | flexcan | ++---------------------------+----------------+------------------+ +| GPIO_LPSR_01 | CAN3_RX | flexcan | ++---------------------------+----------------+------------------+ +| GPIO_AD_29 | SPI1_CS0 | spi | ++---------------------------+----------------+------------------+ +| GPIO_AD_28 | SPI1_CLK | spi | ++---------------------------+----------------+------------------+ +| GPIO_AD_30 | SPI1_SDO | spi | ++---------------------------+----------------+------------------+ +| GPIO_AD_31 | SPI1_SDI | spi | ++---------------------------+----------------+------------------+ +| GPIO_AD_08 | LPI2C1_SCL | i2c | ++---------------------------+----------------+------------------+ +| GPIO_AD_09 | LPI2C1_SDA | i2c | ++---------------------------+----------------+------------------+ +| GPIO_LPSR_05 | LPI2C5_SCL | i2c | ++---------------------------+----------------+------------------+ +| GPIO_LPSR_04 | LPI2C5_SDA | i2c | ++---------------------------+----------------+------------------+ +| GPIO_AD_04 | FLEXPWM1_PWM2 | pwm | ++---------------------------+----------------+------------------+ +| GPIO_AD_32 | ENET_MDC | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_AD_33 | ENET_MDIO | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_02 | ENET_TX_DATA00 | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_03 | ENET_TX_DATA01 | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_04 | ENET_TX_EN | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_05 | ENET_REF_CLK | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_06 | ENET_RX_DATA00 | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_07 | ENET_RX_DATA01 | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_08 | ENET_RX_EN | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_DISP_B2_09 | ENET_RX_ER | Ethernet | ++---------------------------+----------------+------------------+ +| GPIO_AD_17_SAI1_MCLK | SAI_MCLK | SAI | ++---------------------------+----------------+------------------+ +| GPIO_AD_21_SAI1_TX_DATA00 | SAI1_TX_DATA | SAI | ++---------------------------+----------------+------------------+ +| GPIO_AD_22_SAI1_TX_BCLK | SAI1_TX_BCLK | SAI | ++---------------------------+----------------+------------------+ +| GPIO_AD_23_SAI1_TX_SYNC | SAI1_TX_SYNC | SAI | ++---------------------------+----------------+------------------+ +| GPIO_AD_17_SAI1_MCLK | SAI1_MCLK | SAI | ++---------------------------+----------------+------------------+ +| GPIO_AD_20_SAI1_RX_DATA00 | SAI1_RX_DATA00 | SAI | ++---------------------------+----------------+------------------+ + +Serial Port +=========== + +The MIMXRT1170 SoC has 12 UARTs. + +Programming and Debugging +************************* + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Configuring a Debug Probe +========================= + +A debug probe is used for both flashing and debugging the board. + +.. _Using J-Link RT1170: + +Using J-Link +--------------------------------- + +Install the :ref:`jlink-debug-host-tools` and make sure they are in your search +path. + +Connect the J-Link debugger through the debug adapter board. + +Configuring a Console +===================== + +Use the USB-C from the debug adapter board to access the console with +the following settings for your serial terminal of choice (screen, minicom, putty, +etc.): + +- Speed: 115200 +- Data: 8 bits +- Parity: None +- Stop bits: 1 + +Flashing +======== + +Here is an example for the :ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: vmu_rt1170 + :goals: flash + +You should see the following message in the terminal: + +.. code-block:: console + + ***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx ***** + Hello World! vmu_rt1170 + +Debugging +========= + +Here is an example for the :ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: vmu_rt1170 + :goals: debug + +Open a serial terminal, step through the application in your debugger, and you +should see the following message in the terminal: + +.. code-block:: console + + ***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx ***** + Hello World! vmu_rt1170 + +.. _VMU RT1170 Website: + https://www.nxp.com/part/VMU-RT1170 + +.. _VMU RT1170 User Guide: + https://cognipilot.org/cerebri/boards/nxp_vmu_rt1170/ + +.. _VMU RT1170 Schematics: + https://github.com/CogniPilot/NXP-VMU_RT117x-HW + +.. _i.MX RT1170 Datasheet: + https://www.nxp.com/docs/en/data-sheet/IMXRT1170CEC.pdf + +.. _i.MX RT1170 Reference Manual: + https://www.nxp.com/webapp/Download?colCode=IMXRT1170RM diff --git a/boards/arm/vmu_rt1170/doc/vmu_rt1170.jpg b/boards/arm/vmu_rt1170/doc/vmu_rt1170.jpg new file mode 100644 index 00000000000..0d2bd84e542 Binary files /dev/null and b/boards/arm/vmu_rt1170/doc/vmu_rt1170.jpg differ diff --git a/boards/arm/vmu_rt1170/flexspi_nor_config.c b/boards/arm/vmu_rt1170/flexspi_nor_config.c new file mode 100644 index 00000000000..21523fc29d0 --- /dev/null +++ b/boards/arm/vmu_rt1170/flexspi_nor_config.c @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2019, MADMACHINE LIMITED + * + * refer to hal_nxp board file + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/*! + * @brief ROM API init + * + * Get the bootloader api entry address. + */ +void ROM_API_Init(void); + +/*! + * @brief Initialize Serial NOR devices via FLEXSPI + * + * This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs. + * + * @param instance storage the instance of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * + * @retval kStatus_Success Api was executed successfully. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout + */ +status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, struct flexspi_nor_config_t *config); + + + +#ifdef CONFIG_NXP_IMX_RT_BOOT_HEADER +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) +__attribute__((section(".boot_hdr.conf"))) +#elif defined(__ICCARM__) +#pragma location = ".boot_hdr.conf" +#endif + +/* Config used for booting */ + +const struct flexspi_nor_config_t Qspiflash_config = { + .memConfig = { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = + kFlexSPIReadSampleClk_LoopbackInternally, + .csHoldTime = 1u, + .csSetupTime = 1u, + .sflashPadType = kSerialFlash_1Pad, + .serialClkFreq = kFlexSpiSerialClk_80MHz, + .sflashA1Size = 64u * 1024u * 1024u, + .lookupTable = { + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, + 0x03, RADDR_SDR, + FLEXSPI_1PAD, 0x18), + FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, + 0x04, STOP, + FLEXSPI_1PAD, 0), + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .blockSize = 64u * 1024u, + .isUniformBlockSize = false, +}; +#endif /* CONFIG_NXP_IMX_RT_BOOT_HEADER */ + +/* Config used for code execution */ +const struct flexspi_nor_config_t g_flash_fast_config = { + .memConfig = { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad, + .csHoldTime = 1, + .csSetupTime = 1, + .deviceModeCfgEnable = 1, + .deviceModeType = kDeviceConfigCmdType_Spi2Xpi, + .waitTimeCfgCommands = 1, + .deviceModeSeq = { + .seqNum = 1, + .seqId = 6, /* See Lookup table for more details */ + .reserved = 0, + }, + .deviceModeArg = 2, /* Enable OPI DDR mode */ + .controllerMiscOption = + (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) + | (1u << kFlexSpiMiscOffset_DdrModeEnable), + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_8Pads, + .serialClkFreq = kFlexSpiSerialClk_200MHz, + .sflashA1Size = 64ul * 1024u * 1024u, + .busyOffset = 0u, + .busyBitPolarity = 0u, + .lookupTable = { + /* Read */ + [0 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, + 0xEE, CMD_DDR, FLEXSPI_8PAD, 0x11), + [0 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, + 0x20, DUMMY_DDR, FLEXSPI_8PAD, 0x04), + [0 + 2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, + 0x04, STOP, FLEXSPI_1PAD, 0x00), + + /* Write enable SPI */ + [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, + 0x06, STOP, FLEXSPI_1PAD, 0x00), + + /*Write Configuration Register 2 =01, Enable OPI DDR mode*/ + [4 * 6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, + 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), + [4 * 6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, + 0x00, CMD_SDR, FLEXSPI_1PAD, 0x00), + [4 * 6 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, + 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), + + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .blockSize = 64u * 1024u, + .isUniformBlockSize = false, + .ipcmdSerialClkFreq = 1, + .serialNorType = 2, + .reserve2[0] = 0x7008200, +}; + + +__ramfunc int imxrt_reclock_initialize(void) +{ + const uint32_t instance = 1; + + volatile struct flexspi_nor_config_t bootConfig; + + memcpy((struct flexspi_nor_config_t *)&bootConfig, &g_flash_fast_config, + sizeof(struct flexspi_nor_config_t)); + bootConfig.memConfig.tag = FLEXSPI_CFG_BLK_TAG; + + ROM_API_Init(); + + ROM_FLEXSPI_NorFlash_Init(instance, (struct flexspi_nor_config_t *)&bootConfig); + + return 0; +} + +SYS_INIT(imxrt_reclock_initialize, PRE_KERNEL_1, 0); diff --git a/boards/arm/vmu_rt1170/vmu_rt1170-pinctrl.dtsi b/boards/arm/vmu_rt1170/vmu_rt1170-pinctrl.dtsi new file mode 100644 index 00000000000..4f9cdf77857 --- /dev/null +++ b/boards/arm/vmu_rt1170/vmu_rt1170-pinctrl.dtsi @@ -0,0 +1,373 @@ +/* + * Copyright 2023 NXP + * SPDX-License-Identifier: Apache-2.0 + * + * Note: File generated by rt_cfg_utils.py + * from vmu_rt1170.mex + */ + +#include + +&pinctrl { + + + pinmux_regulator: pinmux_regulator { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_34_gpio_mux2_io02>, + <&iomuxc_gpio_emc_b1_37_gpio_mux2_io05>, + <&iomuxc_gpio_emc_b1_33_gpio_mux2_io01>, + <&iomuxc_gpio_emc_b1_22_gpio_mux1_io22>, + <&iomuxc_gpio_emc_b1_14_gpio_mux1_io14>, + <&iomuxc_gpio_emc_b1_36_gpio_mux2_io04>, + <&iomuxc_gpio_emc_b1_38_gpio_mux2_io06>, + <&iomuxc_gpio_emc_b1_01_gpio_mux1_io01>, + <&iomuxc_gpio_disp_b2_08_gpio_mux5_io09>; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_enet: pinmux_enet { + group0 { + pinmux = <&iomuxc_gpio_disp_b2_09_gpio_mux5_io10>, + <&iomuxc_gpio_disp_b1_00_enet_1g_rx_en>, + <&iomuxc_gpio_disp_b1_01_enet_1g_rx_er>; + drive-strength = "high"; + bias-pull-down; + slew-rate = "fast"; + }; + group1 { + pinmux = <&iomuxc_gpio_emc_b2_15_enet_1g_rdata00>, + <&iomuxc_gpio_emc_b2_16_enet_1g_rdata01>; + drive-strength = "high"; + bias-pull-down; + slew-rate = "fast"; + input-enable; + }; + group2 { + pinmux = <&iomuxc_gpio_emc_b2_19_enet_1g_mdc>, + <&iomuxc_gpio_emc_b2_20_enet_1g_mdio>, + <&iomuxc_gpio_disp_b1_09_enet_1g_tdata00>, + <&iomuxc_gpio_disp_b1_08_enet_1g_tdata01>, + <&iomuxc_gpio_disp_b1_10_enet_1g_tx_en>; + drive-strength = "high"; + slew-rate = "fast"; + }; + group3 { + pinmux = <&iomuxc_gpio_disp_b1_11_enet_1g_ref_clk1>; + drive-strength = "high"; + slew-rate = "slow"; + input-enable; + }; + }; + + pinmux_flexcan1: pinmux_flexcan1 { + group0 { + pinmux = <&iomuxc_gpio_ad_07_can1_rx>, + <&iomuxc_gpio_ad_06_can1_tx>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_flexcan2: pinmux_flexcan2 { + group0 { + pinmux = <&iomuxc_gpio_ad_01_can2_rx>, + <&iomuxc_gpio_ad_00_can2_tx>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_flexcan3: pinmux_flexcan3 { + group0 { + pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>, + <&iomuxc_lpsr_gpio_lpsr_00_can3_tx>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + /* pwm pins for vmu and io ports */ + pinmux_flexpwm_vmu_ch1: pinmux_flexpwm_vmu_ch1 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_23_flexpwm1_pwm0_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch2: pinmux_flexpwm_vmu_ch2 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_25_flexpwm1_pwm1_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch3: pinmux_flexpwm_vmu_ch3 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_27_flexpwm1_pwm2_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch4: pinmux_flexpwm_vmu_ch4 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_06_flexpwm2_pwm0_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch5: pinmux_flexpwm_vmu_ch5 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_08_flexpwm2_pwm1_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch6: pinmux_flexpwm_vmu_ch6 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_10_flexpwm2_pwm2_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch7: pinmux_flexpwm_vmu_ch7 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_19_flexpwm2_pwm3_a>; + slew-rate = "fast"; + }; + }; + + pinmux_flexpwm_vmu_ch8: pinmux_flexpwm_vmu_ch8 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_29_flexpwm3_pwm0_a>; + slew-rate = "fast"; + }; + }; + + + pinmux_flexspi1: pinmux_flexspi1 { + group0 { + pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_a_dqs>, + <&iomuxc_gpio_sd_b2_06_flexspi1_a_ss0_b>, + <&iomuxc_gpio_sd_b2_07_flexspi1_a_sclk>, + <&iomuxc_gpio_sd_b2_08_flexspi1_a_data00>, + <&iomuxc_gpio_sd_b2_09_flexspi1_a_data01>, + <&iomuxc_gpio_sd_b2_10_flexspi1_a_data02>, + <&iomuxc_gpio_sd_b2_11_flexspi1_a_data03>; + bias-pull-down; + input-enable; + }; + }; + + pinmux_gpt_ppm: pinmux_gpt_ppm { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_09_gpt5_capture1>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_lpadc1: pinmux_lpadc1 { + group0 { + pinmux = <&iomuxc_gpio_ad_10_adc1_ch2a>; + drive-strength = "normal"; + slew-rate = "slow"; + }; + }; + + pinmux_lpi2c1: pinmux_lpi2c1 { + group0 { + pinmux = <&iomuxc_gpio_ad_08_lpi2c1_scl>, + <&iomuxc_gpio_ad_09_lpi2c1_sda>; + drive-strength = "normal"; + drive-open-drain; + slew-rate = "fast"; + input-enable; + }; + }; + + pinmux_lpi2c2: pinmux_lpi2c2 { + group0 { + pinmux = <&iomuxc_gpio_ad_18_lpi2c2_scl>, + <&iomuxc_gpio_ad_19_lpi2c2_sda>, + <&iomuxc_gpio_emc_b1_35_gpio_mux2_io03>; + drive-strength = "normal"; + drive-open-drain; + slew-rate = "fast"; + input-enable; + }; + }; + + pinmux_lpi2c3: pinmux_lpi2c3 { + group0 { + pinmux = <&iomuxc_gpio_disp_b2_10_lpi2c3_scl>, + <&iomuxc_gpio_disp_b2_11_lpi2c3_sda>; + drive-strength = "normal"; + drive-open-drain; + slew-rate = "fast"; + input-enable; + }; + }; + + pinmux_lpi2c6: pinmux_lpi2c6 { + group0 { + pinmux = <&iomuxc_lpsr_gpio_lpsr_07_lpi2c6_scl>, + <&iomuxc_lpsr_gpio_lpsr_06_lpi2c6_sda>; + drive-strength = "normal"; + drive-open-drain; + slew-rate = "fast"; + input-enable; + }; + }; + + pinmux_lpspi1: pinmux_lpspi1 { + group0 { + pinmux = <&iomuxc_gpio_emc_b2_01_gpio_mux2_io11>, + <&iomuxc_gpio_emc_b2_00_lpspi1_sck>, + <&iomuxc_gpio_emc_b2_03_lpspi1_sdi>, + <&iomuxc_gpio_emc_b2_02_lpspi1_sdo>, + <&iomuxc_gpio_ad_20_gpio_mux3_io19>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_lpspi2: pinmux_lpspi2 { + group0 { + pinmux = <&iomuxc_gpio_ad_25_gpio_mux3_io24>, + <&iomuxc_gpio_ad_24_lpspi2_sck>, + <&iomuxc_gpio_ad_27_lpspi2_sdi>, + <&iomuxc_gpio_ad_26_lpspi2_sdo>, + <&iomuxc_gpio_emc_b1_39_gpio_mux2_io07>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_lpspi3: pinmux_lpspi3 { + group0 { + pinmux = <&iomuxc_gpio_emc_b2_04_lpspi3_sck>, + <&iomuxc_gpio_emc_b2_07_lpspi3_sdi>, + <&iomuxc_gpio_emc_b2_06_lpspi3_sdo>, + <&iomuxc_gpio_emc_b2_05_gpio_mux2_io15>, + <&iomuxc_gpio_emc_b2_08_gpio_mux2_io18>, + <&iomuxc_gpio_ad_21_gpio_mux3_io20>, + <&iomuxc_gpio_emc_b2_18_gpio_mux2_io28>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_lpspi6: pinmux_lpspi6 { + group0 { + pinmux = <&iomuxc_lpsr_gpio_lpsr_09_lpspi6_pcs0>, + <&iomuxc_lpsr_gpio_lpsr_10_lpspi6_sck>, + <&iomuxc_lpsr_gpio_lpsr_12_lpspi6_sdi>, + <&iomuxc_lpsr_gpio_lpsr_11_lpspi6_sdo>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart1: pinmux_lpuart1 { + group0 { + pinmux = <&iomuxc_gpio_disp_b1_03_lpuart1_rx>, + <&iomuxc_gpio_disp_b1_02_lpuart1_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart3: pinmux_lpuart3 { + group0 { + pinmux = <&iomuxc_gpio_ad_31_lpuart3_rx>, + <&iomuxc_gpio_ad_30_lpuart3_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart4: pinmux_lpuart4 { + group0 { + pinmux = <&iomuxc_gpio_disp_b1_04_lpuart4_rx>, + <&iomuxc_gpio_disp_b1_06_lpuart4_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart5: pinmux_lpuart5 { + group0 { + pinmux = <&iomuxc_gpio_ad_29_lpuart5_rx>, + <&iomuxc_gpio_ad_28_lpuart5_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart6: pinmux_lpuart6 { + group0 { + pinmux = <&iomuxc_gpio_emc_b1_41_lpuart6_rx>, + <&iomuxc_gpio_emc_b1_40_lpuart6_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart8: pinmux_lpuart8 { + group0 { + pinmux = <&iomuxc_gpio_ad_03_lpuart8_rx>, + <&iomuxc_gpio_ad_02_lpuart8_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart10: pinmux_lpuart10 { + group0 { + pinmux = <&iomuxc_gpio_ad_33_lpuart10_rx>, + <&iomuxc_gpio_ad_15_lpuart10_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_lpuart11: pinmux_lpuart11 { + group0 { + pinmux = <&iomuxc_lpsr_gpio_lpsr_05_lpuart11_rx>, + <&iomuxc_lpsr_gpio_lpsr_04_lpuart11_tx>; + drive-strength = "high"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_usdhc1: pinmux_usdhc1 { + group0 { + pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>, + <&iomuxc_gpio_sd_b1_02_usdhc1_data0>, + <&iomuxc_gpio_sd_b1_03_usdhc1_data1>, + <&iomuxc_gpio_sd_b1_04_usdhc1_data2>, + <&iomuxc_gpio_sd_b1_05_usdhc1_data3>; + bias-pull-up; + drive-strength = "high"; + slew-rate = "fast"; + input-enable; + }; + group1 { + pinmux = <&iomuxc_gpio_sd_b1_01_usdhc1_clk>, + <&iomuxc_gpio_ad_32_usdhc1_cd_b>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; + +}; diff --git a/boards/arm/vmu_rt1170/vmu_rt1170.dts b/boards/arm/vmu_rt1170/vmu_rt1170.dts new file mode 100644 index 00000000000..acdf8c6b921 --- /dev/null +++ b/boards/arm/vmu_rt1170/vmu_rt1170.dts @@ -0,0 +1,455 @@ +/* + * Copyright 2023 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include "vmu_rt1170.dtsi" + +/ { + model = "NXP VMU RT1170"; + compatible = "nxp,mimxrt1176"; + + aliases { + led0 = &green_led; + led1 = &red_led; + watchdog0 = &wdog1; + sdhc0 = &usdhc1; + }; + + chosen { + zephyr,sram = &ocram1; /* TODO Merge with other OCRAM */ + zephyr,sram1 = &ocram2; /* TODO Merge with other OCRAM */ + zephyr,dtcm = &dtcm; + zephyr,itcm = &itcm; + zephyr,console = &lpuart1; + zephyr,shell-uart = &lpuart1; + zephyr,canbus = &flexcan1; + zephyr,flash-controller = &mx25um51345g; + zephyr,flash = &mx25um51345g; + zephyr,code-partition = &slot0_partition; + }; + + /* This regulator controls VDD_3V3_SD_CARD onboard supply */ + reg-3v3-sdcard { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sdcard"; + enable-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls VDD_5V_PERIPH onboard supply */ + reg-5v-periph { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-5v-periph"; + enable-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls VDD_5V_HIPOWER onboard supply */ + reg-5v-hipower { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-5v-hipower"; + enable-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls the VDD_3V3_SENSORS1 onboard supply. */ + reg-3v3-sensors-1 { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sensors-1"; + enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + startup-delay-us = <2000>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls the VDD_3V3_SENSORS2 onboard supply. */ + reg-3v3-sensors-2 { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sensors-2"; + enable-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + startup-delay-us = <2000>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls the VDD_3V3_SENSORS3 onboard supply. */ + reg-3v3-sensors-3 { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sensors-3"; + enable-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + startup-delay-us = <2000>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls the VDD_3V3_SENSORS4 onboard supply. */ + reg-3v3-sensors-4 { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sensors-4"; + enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; + startup-delay-us = <2000>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls VDD_3V3_SPEKTRUM onboard supply */ + reg-3v3-spektrum { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-spektrum"; + enable-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls ETH_VDD_3V3 supply to power up the TJA1103 PHY */ + reg-eth-power { + pinctrl-0 = <&pinmux_regulator>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-eth-power"; + enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; + regulator-always-on; + status = "okay"; + }; +}; + + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&gpio8 { + status = "okay"; +}; + +&gpio9 { + status = "okay"; +}; + +&lpuart1 { + status = "okay"; + current-speed = <115200>; +}; + +&lpuart4 { + status = "okay"; + current-speed = <115200>; +}; + + +&flexcan1 { + status = "okay"; + pinctrl-0 = <&pinmux_flexcan1>; + pinctrl-names = "default"; + bus-speed = <125000>; + bus-speed-data = <1000000>; + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&flexcan2 { + status = "okay"; + pinctrl-0 = <&pinmux_flexcan2>; + pinctrl-names = "default"; + bus-speed = <125000>; + bus-speed-data = <1000000>; + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&flexcan3 { + status = "okay"; + pinctrl-0 = <&pinmux_flexcan3>; + pinctrl-names = "default"; + bus-speed = <125000>; + bus-speed-data = <1000000>; + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&lpspi1 { + status = "okay"; + cs-gpios =<&gpio2 11 GPIO_ACTIVE_LOW>; + + icm42688_0: icm42688p0@0 { + compatible = "invensense,icm42688"; + reg = <0>; + int-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <24000000>; + accel-hz = <1000>; + accel-fs = <16>; + gyro-hz = <1000>; + gyro-fs = <2000>; + }; +}; + +&lpspi2 { + status = "okay"; + cs-gpios =<&gpio3 24 GPIO_ACTIVE_LOW>; + + icm42688_1: icm42688p1@0 { + compatible = "invensense,icm42688"; + reg = <0>; + int-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <24000000>; + accel-hz = <1000>; + accel-fs = <16>; + gyro-hz = <1000>; + gyro-fs = <2000>; + }; +}; + +&lpspi3 { + status = "okay"; + cs-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>, + <&gpio2 18 GPIO_ACTIVE_LOW>; + + + bmi08x_accel: bmi08x@0 { + compatible = "bosch,bmi08x-accel"; + reg = <0>; + int-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <24000000>; + int1-map-io = <0x01>; + int2-map-io = <0x00>; + int1-conf-io = <0x04>; + int2-conf-io = <0x00>; + accel-hz = "800"; + accel-fs = <24>; + }; + + bmi08x_gyro: bmi08x@1 { + compatible = "bosch,bmi08x-gyro"; + reg = <1>; + int-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <24000000>; + int3-4-map-io = <0x01>; + int3-4-conf-io = <0x02>; + gyro-hz = "1000_116"; + gyro-fs = <1000>; + }; +}; + +&lpspi6 { + status = "okay"; +}; + +&lpi2c1 { + status = "okay"; + + ist8310: ist8310@e { + compatible = "isentek,ist8310"; + reg = <0xe>; + + }; + + ncp5623c: ncp5623c@39 { + compatible = "onnn,ncp5623c"; + reg = <0x39>; + + led_0 { + label = "GNSS LED"; + index = <0>; + color-mapping = + , + , + ; + }; + }; +}; + +&lpi2c2 { + status = "okay"; + clock-frequency = ; + + bmp388_0: bmp388@76 { + compatible = "bosch,bmp388"; + int-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + reg = <0x76>; + status = "okay"; + odr = "50"; + osr-press = <4>; + osr-temp = <2>; + }; +}; + +&lpi2c3 { + status = "okay"; + clock-frequency = ; + + bmm150: bmm150@10 { + compatible = "bosch,bmm150"; + status = "okay"; + reg = <0x10>; + }; + + bmp388_1: bmp388@77 { + compatible = "bosch,bmp388"; + reg = <0x77>; + status = "okay"; + odr = "50"; + osr-press = <4>; + osr-temp = <2>; + }; +}; + +&lpi2c6 { + status = "okay"; +}; + +&flexpwm1_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch1>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm1_pwm1 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch2>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm1_pwm2 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch3>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm2_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch4>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm2_pwm1 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch5>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm2_pwm2 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch6>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm2_pwm3 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch7>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + +&flexpwm3_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_vmu_ch8>; + pinctrl-names = "default"; + nxp,prescaler = <64>; +}; + + +&gpt5 { + compatible = "nxp,gpt-ppm-input"; + pinctrl-0 = <&pinmux_gpt_ppm>; + pinctrl-names = "default"; + capture-channel = <1>; +}; + +&usdhc1 { + status = "okay"; + sdmmc { + compatible = "zephyr,sdmmc-disk"; + status = "okay"; + }; +}; + +&edma0 { + status = "okay"; +}; + +&lpadc1 { + status = "okay"; +}; + +/* GPT and Systick are enabled. If power management is enabled, the GPT + * timer will be used instead of systick, as allows the core clock to + * be gated. + */ +&gpt_hw_timer { + status = "disabled"; +}; + +&systick { + status = "okay"; +}; + +&wdog1 { + status = "okay"; +}; + +&enet1g { + status = "okay"; + int-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>; +}; + +zephyr_udc0: &usb1 { + status = "okay"; +}; diff --git a/boards/arm/vmu_rt1170/vmu_rt1170.dtsi b/boards/arm/vmu_rt1170/vmu_rt1170.dtsi new file mode 100644 index 00000000000..075dc1860dc --- /dev/null +++ b/boards/arm/vmu_rt1170/vmu_rt1170.dtsi @@ -0,0 +1,215 @@ +/* + * Copyright 2023 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "vmu_rt1170-pinctrl.dtsi" + +/ { + aliases { + led0 = &green_led; + led1 = &red_led; + led2 = &blue_led; + sdhc0 = &usdhc1; + }; + + leds { + compatible = "gpio-leds"; + green_led: led-1 { + gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; + label = "Green LED"; + }; + + red_led: led-2 { + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + label = "Red LED"; + }; + + blue_led: led-3 { + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + label = "Blue LED"; + }; + }; +}; + +&semc { + status = "disabled"; +}; + +&lpuart1 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart1>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart3 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart3>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart4 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart4>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart5 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart5>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart6 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart6>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart8 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart8>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart10 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart10>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&lpuart11 { + status = "okay"; + pinctrl-0 = <&pinmux_lpuart11>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&green_led { + status = "okay"; +}; + +&enet1g { + pinctrl-0 = <&pinmux_enet>; + pinctrl-names = "default"; +}; + +&flexcan1 { + pinctrl-0 = <&pinmux_flexcan1>; + pinctrl-names = "default"; +}; + +&flexcan2 { + pinctrl-0 = <&pinmux_flexcan2>; + pinctrl-names = "default"; +}; + +&flexcan3 { + pinctrl-0 = <&pinmux_flexcan3>; + pinctrl-names = "default"; +}; + +&lpi2c1 { + pinctrl-0 =<&pinmux_lpi2c1>; + pinctrl-names = "default"; +}; + +&lpi2c2 { + pinctrl-0 =<&pinmux_lpi2c2>; + pinctrl-names = "default"; +}; + +&lpi2c3 { + pinctrl-0 =<&pinmux_lpi2c3>; + pinctrl-names = "default"; +}; + +&lpi2c6 { + pinctrl-0 =<&pinmux_lpi2c6>; + pinctrl-names = "default"; +}; + +&lpspi1 { + pinctrl-0 = <&pinmux_lpspi1>; + pinctrl-names = "default"; +}; + +&lpspi2 { + pinctrl-0 = <&pinmux_lpspi2>; + pinctrl-names = "default"; +}; + +&lpspi3 { + pinctrl-0 = <&pinmux_lpspi3>; + pinctrl-names = "default"; +}; + +&lpspi6 { + pinctrl-0 = <&pinmux_lpspi6>; + pinctrl-names = "default"; +}; + +&lpadc1 { + pinctrl-0 = <&pinmux_lpadc1>; + pinctrl-names = "default"; +}; + +&flexspi { + pinctrl-0 = <&pinmux_flexspi1>; + pinctrl-names = "default"; +}; + +&usdhc1 { + pinctrl-0 = <&pinmux_usdhc1>; + pinctrl-names = "default"; +}; + +&flexspi { + status = "okay"; + ahb-prefetch; + ahb-read-addr-opt; + rx-clock-source = <1>; + reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(16)>; + mx25um51345g: mx25um51345g@0 { + compatible = "nxp,imx-flexspi-mx25um51345g"; + /* MX25UM51245G is 64MB, 512MBit flash part */ + size = ; + reg = <0>; + spi-max-frequency = <200000000>; + status = "okay"; + jedec-id = [c2 81 3a]; + erase-block-size = <4096>; + write-block-size = <16>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(128)>; + }; + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 DT_SIZE_K(3076)>; + }; + slot1_partition: partition@321000 { + label = "image-1"; + reg = <0x00321000 DT_SIZE_K(3072)>; + }; + storage_partition: partition@621000 { + label = "storage"; + reg = <0x00621000 DT_SIZE_M(57)>; + }; + }; + }; +}; diff --git a/boards/arm/vmu_rt1170/vmu_rt1170.yaml b/boards/arm/vmu_rt1170/vmu_rt1170.yaml new file mode 100644 index 00000000000..0b60cd42e75 --- /dev/null +++ b/boards/arm/vmu_rt1170/vmu_rt1170.yaml @@ -0,0 +1,29 @@ +# +# Copyright (c) 2021, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: vmu_rt1170 +name: NXP VMU RT1170 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 256 +flash: 65536 +supported: + - adc + - counter + - can + - dma + - gpio + - hwinfo + - i2c + - netif:eth + - pwm + - spi + - usb_device + - watchdog diff --git a/boards/arm/vmu_rt1170/vmu_rt1170_defconfig b/boards/arm/vmu_rt1170/vmu_rt1170_defconfig new file mode 100644 index 00000000000..875d84e7b64 --- /dev/null +++ b/boards/arm/vmu_rt1170/vmu_rt1170_defconfig @@ -0,0 +1,23 @@ +# +# Copyright (c) 2021, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_SOC_MIMXRT1176_CM7=y +CONFIG_SOC_SERIES_IMX_RT=y +CONFIG_CONSOLE=y +CONFIG_SHELL=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_GPIO=y +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y +CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET=0x400 +CONFIG_PINCTRL=y + +# Enable Regulators +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_INIT_PRIORITY=75 + +CONFIG_TICKLESS_KERNEL=n diff --git a/soc/arm/nxp_imx/rt/flexspi_nor_config.h b/soc/arm/nxp_imx/rt/flexspi_nor_config.h index b00e90b4baa..3eac1ce548c 100644 --- a/soc/arm/nxp_imx/rt/flexspi_nor_config.h +++ b/soc/arm/nxp_imx/rt/flexspi_nor_config.h @@ -90,7 +90,8 @@ enum { kFlexSpiSerialClk_100MHz = 6, kFlexSpiSerialClk_133MHz = 7, }; -#elif defined(CONFIG_SOC_MIMXRT1051) || defined(CONFIG_SOC_MIMXRT1052) +#elif defined(CONFIG_SOC_MIMXRT1051) || defined(CONFIG_SOC_MIMXRT1052) || \ + defined(CONFIG_SOC_SERIES_IMX_RT11XX) enum { kFlexSpiSerialClk_30MHz = 1, kFlexSpiSerialClk_50MHz = 2, diff --git a/tests/drivers/adc/adc_api/boards/vmu_rt1170.overlay b/tests/drivers/adc/adc_api/boards/vmu_rt1170.overlay new file mode 100644 index 00000000000..2b310ca6f3f --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/vmu_rt1170.overlay @@ -0,0 +1,34 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright 2023 CogniPilot Foundation + */ + +#include + +/ { + zephyr,user { + io-channels = <&lpadc1 0>, <&lpadc1 1>; + }; +}; + +&lpadc1 { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_EXTERNAL0"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_EXTERNAL0"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +};