boards: arm: Add support for Actinius Icarus SoM (uC: Nordic nRF9160)

Add support for the Actinius Icarus SoM (nRF9160).

Signed-off-by: Alex Tsamakos <alex@actinius.com>

boards/arm/actinius_icarus_som/CMakeLists.txt

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+#
+# Copyright (c) 2021 Actinius
+#
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+zephyr_library_sources(board.c)

boards/arm/actinius_icarus_som/Kconfig

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+# Actinius Icarus SoM board configuration
+
+# Copyright (c) 2021 Actinius
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_ACTINIUS_ICARUS_SOM || BOARD_ACTINIUS_ICARUS_SOM_NS
+
+config BOARD_SELECT_SIM_EXTERNAL
+	bool "Use external SIM"
+	help
+	  Use the external SIM for communication, instead of the eSIM
+
+module = BOARD_ICARUS_SOM
+module-str = Board Control
+source "subsys/logging/Kconfig.template.log_config"
+
+endif # BOARD_ACTINIUS_ICARUS_SOM || BOARD_ACTINIUS_ICARUS_SOM_NS

boards/arm/actinius_icarus_som/Kconfig.board

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+# Actinius Icarus SoM board configuration
+
+# Copyright (c) 2021 Actinius
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_NRF9160_SICA
+
+config BOARD_ACTINIUS_ICARUS_SOM
+	bool "Actinius Icarus SoM"
+
+config BOARD_ACTINIUS_ICARUS_SOM_NS
+	bool "Actinius Icarus SoM Non-Secure"
+
+endif # SOC_NRF9160_SICA

boards/arm/actinius_icarus_som/Kconfig.defconfig

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+# Actinius Icarus SoM board configuration
+
+# Copyright (c) 2021 Actinius
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_ACTINIUS_ICARUS_SOM || BOARD_ACTINIUS_ICARUS_SOM_NS
+
+config BOARD
+	default "actinius_icarus_som"
+
+# For the secure version of the board the firmware is linked at the beginning
+# of the flash, or into the code-partition defined in DT if it is intended to
+# be loaded by MCUboot. If the secure firmware is to be combined with a non-
+# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
+# be restricted to the size of its code partition.
+# For the non-secure version of the board, the firmware
+# must be linked into the code-partition (non-secure) defined in DT, regardless.
+# Apply this configuration below by setting the Kconfig symbols used by
+# the linker according to the information extracted from DT partitions.
+
+# Workaround for not being able to have commas in macro arguments
+DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+	depends on BOARD_ACTINIUS_ICARUS_SOM && TRUSTED_EXECUTION_SECURE
+
+if BOARD_ACTINIUS_ICARUS_SOM_NS
+
+config FLASH_LOAD_OFFSET
+	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+endif # BOARD_ACTINIUS_ICARUS_SOM_NS
+
+endif # BOARD_ACTINIUS_ICARUS_SOM || BOARD_ACTINIUS_ICARUS_SOM_NS

boards/arm/actinius_icarus_som/actinius_icarus_som.dts

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+/*
+ * Copyright (c) 2021 Actinius
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9160_sica.dtsi>
+#include "actinius_icarus_som_common.dts"
+
+/ {
+	chosen {
+		zephyr,sram = &sram0_s;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,sram-secure-partition = &sram0_s;
+		zephyr,sram-non-secure-partition = &sram0_ns;
+	};
+};

boards/arm/actinius_icarus_som/actinius_icarus_som.yaml

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+identifier: actinius_icarus_som
+name: Actinius Icarus SoM
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - xtools
+  - zephyr
+ram: 64
+flash: 256
+supported:
+  - gpio
+  - i2c
+  - pwm
+  - watchdog
+  - counter

boards/arm/actinius_icarus_som/actinius_icarus_som_common.dts

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+/*
+ * Copyright (c) 2021 Actinius
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	model = "Actinius Icarus SoM";
+	compatible = "actinius,icarus_som";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,uart-mcumgr = &uart0;
+	};
+};
+
+&adc {
+	status ="okay";
+};
+
+&gpiote {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+
+	current-speed = <115200>;
+	tx-pin = <9>;
+	rx-pin = <6>;
+};
+
+&i2c2 {
+	compatible = "nordic,nrf-twim";
+	status = "okay";
+
+	clock-frequency = <I2C_BITRATE_FAST>;
+	sda-pin = <10>;
+	scl-pin = <11>;
+
+	lis2dh12-accel@19 {
+		compatible = "st,lis2dh12", "st,lis2dh";
+		reg = <0x19>;
+		irq-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>,
+			  <&gpio0 29 GPIO_ACTIVE_HIGH>;
+		label = "LIS2DH12-ACCEL";
+	};
+};
+
+&timer0 {
+	status = "okay";
+};
+
+&timer1 {
+	status = "okay";
+};
+
+&timer2 {
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0x10000>;
+		};
+		slot0_partition: partition@10000 {
+			label = "image-0";
+		};
+		slot0_ns_partition: partition@50000 {
+			label = "image-0-nonsecure";
+		};
+		slot1_partition: partition@80000 {
+			label = "image-1";
+		};
+		slot1_ns_partition: partition@c0000 {
+			label = "image-1-nonsecure";
+		};
+		scratch_partition: partition@f0000 {
+			label = "image-scratch";
+			reg = <0x000f0000 0xa000>;
+		};
+		storage_partition: partition@fa000 {
+			label = "storage";
+			reg = <0x000fa000 0x00006000>;
+		};
+	};
+};
+
+/ {
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		sram0_s: image_s@20000000 {
+			/* Secure image memory */
+		};
+
+		sram0_modem: image_modem@20010000 {
+			/* BSD (shared) memory */
+		};
+
+		sram0_ns: image_ns@20020000 {
+			/* Non-Secure image memory */
+		};
+	};
+};
+
+/* Include partition configuration file */
+#include "actinius_icarus_som_partition_conf.dts"

boards/arm/actinius_icarus_som/actinius_icarus_som_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_NRF91X=y
+CONFIG_SOC_NRF9160_SICA=y
+CONFIG_BOARD_ACTINIUS_ICARUS_SOM=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# Enable uart driver
+CONFIG_SERIAL=y
+
+# enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/arm/actinius_icarus_som/actinius_icarus_som_ns.dts

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+/*
+ * Copyright (c) 2021 Actinius
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9160ns_sica.dtsi>
+#include "actinius_icarus_som_common.dts"
+
+/ {
+	chosen {
+		zephyr,flash = &flash0;
+		zephyr,sram = &sram0_ns;
+		zephyr,code-partition = &slot0_ns_partition;
+	};
+};

boards/arm/actinius_icarus_som/actinius_icarus_som_ns.yaml

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+identifier: actinius_icarus_som_ns
+name: Actinius Icarus SoM Non-Secure
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - xtools
+  - zephyr
+ram: 128
+flash: 192
+supported:
+  - gpio
+  - i2c
+  - pwm
+  - watchdog
+  - counter

boards/arm/actinius_icarus_som/actinius_icarus_som_ns_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_NRF91X=y
+CONFIG_SOC_NRF9160_SICA=y
+CONFIG_BOARD_ACTINIUS_ICARUS_SOM_NS=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# This Board implies building Non-Secure firmware
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# Enable uart driver
+CONFIG_SERIAL=y
+
+# enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/arm/actinius_icarus_som/actinius_icarus_som_partition_conf.dts

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+/*
+ * Copyright (c) 2021 Actinius
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * Default Flash planning for actinius_icarus_som.
+ *
+ * Zephyr build for nRF9160 with ARM TrustZone-M support,
+ * implies building Secure and Non-Secure Zephyr images.
+ *
+ * Secure image will be placed, by default, in flash0
+ * (or in slot0, if MCUboot is present).
+ * Secure image will use sram0 for system memory.
+ *
+ * Non-Secure image will be placed in slot0_ns, and use
+ * sram0_ns for system memory.
+ *
+ * Note that the Secure image only requires knowledge of
+ * the beginning of the Non-Secure image (not its size).
+ */
+
+&slot0_partition {
+	reg = <0x00010000 0x40000>;
+};
+
+&slot0_ns_partition {
+	reg = <0x00050000 0x30000>;
+};
+
+&slot1_partition {
+	reg = <0x00080000 0x40000>;
+};
+
+&slot1_ns_partition {
+	reg = <0x000c0000 0x30000>;
+};
+
+/* Default SRAM planning when building for nRF9160 with
+ * ARM TrustZone-M support
+ * - Lowest 64 kB SRAM allocated to Secure image (sram0_s).
+ * - 64 kB SRAM reserved for and used by the modem library
+ *   (sram0_modem). This memory is Non-Secure.
+ * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
+ */
+
+&sram0_s {
+	reg = <0x20000000 DT_SIZE_K(64)>;
+};
+
+&sram0_modem {
+	reg = <0x20010000 DT_SIZE_K(64)>;
+};
+
+&sram0_ns {
+	reg = <0x20020000 DT_SIZE_K(128)>;
+};

boards/arm/actinius_icarus_som/board.c

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+/*
+ * Copyright (c) 2021 Actinius
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <init.h>
+#include <drivers/gpio.h>
+
+#include <logging/log.h>
+LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_ICARUS_SOM_LOG_LEVEL);
+
+#define SIM_SELECT_PIN 12
+
+static void select_sim(void)
+{
+	const struct device *port = device_get_binding(DT_LABEL(DT_NODELABEL(gpio0)));
+
+	if (!port) {
+		LOG_ERR("Could not get GPIO Device Binding");
+
+		return;
+	}
+
+	#ifdef CONFIG_BOARD_SELECT_SIM_EXTERNAL
+		gpio_pin_configure(port, SIM_SELECT_PIN, GPIO_OUTPUT_LOW);
+		LOG_INF("External SIM is selected");
+	#else
+		gpio_pin_configure(port, SIM_SELECT_PIN, GPIO_OUTPUT_HIGH);
+		LOG_INF("eSIM is selected");
+	#endif
+}
+
+static int board_actinius_icarus_som_init(const struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	select_sim();
+
+	return 0;
+}
+
+SYS_INIT(board_actinius_icarus_som_init, POST_KERNEL,
+	 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

boards/arm/actinius_icarus_som/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
+include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/actinius_icarus_som/doc/index.rst

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+.. _actinius_icarus_som:
+
+Actinius Icarus SoM
+###################
+
+Overview
+********
+
+.. figure:: img/icarus-som.png
+     :width: 450px
+     :align: center
+     :alt: Icarus SoM
+
+     Icarus SoM (nRF9160)
+
+The Icarus SoM is a coin-sized, easy-to-solder cellular IoT Module
+built around Nordic Semi's nRF9160 modem and combines
+LTE-M, NB-IoT, GPS, accelerometer as well as an eSIM and option for
+an external nano SIM connector.
+
+The main uController is the Nordic Semiconductor nRF9160, with
+ARM Cortex-M33F CPU, ARMv8-M Security Extension and the
+following devices (provided directly by Nordic):
+
+* :abbr:`ADC (Analog to Digital Converter)`
+* CLOCK
+* FLASH
+* :abbr:`GPIO (General Purpose Input Output)`
+* :abbr:`I2C (Inter-Integrated Circuit)`
+* :abbr:`MPU (Memory Protection Unit)`
+* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
+* :abbr:`PWM (Pulse Width Modulation)`
+* :abbr:`RTC (nRF RTC System Clock)`
+* Segger RTT (RTT Console)
+* :abbr:`SPI (Serial Peripheral Interface)`
+* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)`
+* :abbr:`WDT (Watchdog Timer)`
+* :abbr:`IDAU (Implementation Defined Attribution Unit)`
+
+.. figure:: img/icarus-som-external-pins.png
+     :width: 450px
+     :align: center
+     :alt: Icarus SoM Pins
+
+     Icarus SoM Pins
+
+.. figure:: img/icarus-som-peripherals-pins.png
+     :width: 200px
+     :align: center
+     :alt: Icarus SoM
+
+     Internal Pinouts
+
+Hardware
+********
+
+The detailed information about the on-board hardware can be found at the `Icarus SoM Product Website`_.
+
+Supported Features
+==================
+
+The actinius_icarus_som board configuration supports the following
+hardware features:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| ADC       | on-chip    | adc                  |
++-----------+------------+----------------------+
+| CLOCK     | on-chip    | clock_control        |
++-----------+------------+----------------------+
+| FLASH     | on-chip    | flash                |
++-----------+------------+----------------------+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| I2C(M)    | on-chip    | i2c                  |
++-----------+------------+----------------------+
+| MPU       | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| NVIC      | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| PWM       | on-chip    | pwm                  |
++-----------+------------+----------------------+
+| SPI(M/S)  | on-chip    | spi                  |
++-----------+------------+----------------------+
+| SPU       | on-chip    | system protection    |
++-----------+------------+----------------------+
+| UARTE     | on-chip    | serial               |
++-----------+------------+----------------------+
+| ACCEL     | st         | lis2dh               |
++-----------+------------+----------------------+
+
+
+Security components
+===================
+
+- Implementation Defined Attribution Unit (`IDAU`_).  The IDAU is implemented
+  with the System Protection Unit and is used to define secure and non-secure
+  memory maps.  By default, all of the memory space  (Flash, SRAM, and
+  peripheral address space) is defined to be secure accessible only.
+- Secure boot.
+
+Building Secure/Non-Secure Zephyr applications
+==============================================
+
+The process requires the following steps:
+
+1. Build the Secure Zephyr application using ``-DBOARD=actinius_icarus_som``.
+2. Build the Non-Secure Zephyr application using ``-DBOARD=actinius_icarus_som_ns``.
+3. Merge the two binaries together.
+
+If you are using Segger Embedded Studio v4.18 or later, the two binaries are built, merged, and
+burned automatically, unless you have disabled the feature.
+
+When building a Secure/Non-Secure application, the Secure application will
+have to set the IDAU (SPU) configuration to allow Non-Secure access to all
+CPU resources utilized by the Non-Secure application firmware. SPU
+configuration shall take place before jumping to the Non-Secure application.
+
+More information can be found in the `Icarus SoM Product Website`_ or the
+`Actinius Documentation Portal`_.
+
+References
+**********
+
+.. target-notes::
+
+.. _IDAU:
+   https://developer.arm.com/docs/100690/latest/attribution-units-sau-and-idau
+
+.. _Icarus SoM Product Website:
+   https://www.actinius.com/icarus-som
+
+.. _Actinius Documentation Portal:
+   https://docs.actinius.com

boards/arm/actinius_icarus_som/pre_dt_board.cmake

@@ -0,0 +1,7 @@
+# Copyright (c) 2021 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
+# - flash-controller@39000 & kmu@39000
+# - power@5000 & clock@5000
+list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")