From 0fddb3e458226c83cefe7810d1cb89a30e073c4b Mon Sep 17 00:00:00 2001 From: Daniel DeGrasse Date: Mon, 10 Jan 2022 17:54:18 -0600 Subject: [PATCH] soc: rt11xx: Enabled GPTP module clock gPTP module clock is enabled for rt11xx. gPTP is not working correctly on the RT10xx or RT11xx series, but this module clock needs to be enabled Signed-off-by: Daniel DeGrasse --- drivers/ethernet/Kconfig.mcux | 4 +++- soc/arm/nxp_imx/rt/soc_rt11xx.c | 8 ++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/ethernet/Kconfig.mcux b/drivers/ethernet/Kconfig.mcux index cf568d66732..5ef754086a9 100644 --- a/drivers/ethernet/Kconfig.mcux +++ b/drivers/ethernet/Kconfig.mcux @@ -79,7 +79,9 @@ if PTP_CLOCK_MCUX config ETH_MCUX_PTP_CLOCK_SRC_HZ int "Frequency of the clock source for the PTP timer" - default 50000000 + default 50000000 if SOC_SERIES_KINETIS_K6X + default 50000000 if SOC_SERIES_IMX_RT10XX + default 24000000 if SOC_SERIES_IMX_RT11XX help Set the frequency in Hz sourced to the PTP timer. If the value is set properly, the timer will be accurate. diff --git a/soc/arm/nxp_imx/rt/soc_rt11xx.c b/soc/arm/nxp_imx/rt/soc_rt11xx.c index 2da45050e20..1a2ac1ff572 100644 --- a/soc/arm/nxp_imx/rt/soc_rt11xx.c +++ b/soc/arm/nxp_imx/rt/soc_rt11xx.c @@ -367,11 +367,19 @@ static ALWAYS_INLINE void clock_init(void) #ifdef CONFIG_ETH_MCUX + /* 50 MHz ENET clock */ rootCfg.mux = kCLOCK_ENET1_ClockRoot_MuxSysPll1Div2; rootCfg.div = 10; CLOCK_SetRootClock(kCLOCK_Root_Enet1, &rootCfg); #endif +#ifdef CONFIG_PTP_CLOCK_MCUX + /* 24MHz PTP clock */ + rootCfg.mux = kCLOCK_ENET_TIMER1_ClockRoot_MuxOscRc48MDiv2; + rootCfg.div = 1; + CLOCK_SetRootClock(kCLOCK_Root_Enet_Timer1, &rootCfg); +#endif + #ifdef CONFIG_SPI_MCUX_LPSPI /* Configure lpspi using Osc48MDiv2 */ rootCfg.mux = kCLOCK_LPSPI1_ClockRoot_MuxOscRc48MDiv2;