drivers: ethernet: eth_mcux: add support for resetting phy

add support for resetting phy at boot via GPIO reset pin.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>

boards/arm/mimxrt1020_evk/Kconfig.defconfig

@@ -27,6 +27,9 @@ if NETWORKING
 config NET_L2_ETHERNET
 	default y
 
+config ETH_MCUX_PHY_RESET
+	default y
+
 endif # NETWORKING
 
 endif # BOARD_MIMXRT1020_EVK

boards/arm/mimxrt1020_evk/mimxrt1020_evk.dts

@@ -163,6 +163,8 @@ arduino_serial: &lpuart2 {
 	status = "okay";
 	pinctrl-0 = <&pinmux_enet>;
 	pinctrl-names = "default";
+	int-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
 	ptp {
 		status = "okay";
 		pinctrl-0 = <&pinmux_ptp>;

boards/arm/mimxrt1024_evk/Kconfig.defconfig

@@ -24,6 +24,9 @@ if NETWORKING
 config NET_L2_ETHERNET
 	default y
 
+config ETH_MCUX_PHY_RESET
+	default y
+
 endif # NETWORKING
 
 endif # BOARD_MIMXRT1024_EVK

boards/arm/mimxrt1024_evk/mimxrt1024_evk.dts

@@ -87,6 +87,8 @@
 	status = "okay";
 	pinctrl-0 = <&pinmux_enet>;
 	pinctrl-names = "default";
+	int-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
 	ptp {
 		status = "okay";
 		pinctrl-0 = <&pinmux_ptp>;

boards/arm/mimxrt1050_evk/Kconfig.defconfig

@@ -49,6 +49,9 @@ if NETWORKING
 config NET_L2_ETHERNET
 	default y
 
+config ETH_MCUX_PHY_RESET
+	default y
+
 endif # NETWORKING
 
 if LVGL

boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts

@@ -243,6 +243,8 @@ arduino_serial: &lpuart3 {
 	status = "okay";
 	pinctrl-0 = <&pinmux_enet>;
 	pinctrl-names = "default";
+	int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 	ptp {
 		pinctrl-0 = <&pinmux_ptp>;
 		pinctrl-names = "default";

boards/arm/mimxrt1060_evk/Kconfig.defconfig

@@ -49,6 +49,9 @@ if NETWORKING
 config NET_L2_ETHERNET
 	default y
 
+config ETH_MCUX_PHY_RESET
+	default y
+
 endif # NETWORKING
 
 if LVGL

boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts

@@ -196,6 +196,8 @@ arduino_serial: &lpuart3 {
 	status = "okay";
 	pinctrl-0 = <&pinmux_enet>;
 	pinctrl-names = "default";
+	int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 	ptp {
 		pinctrl-0 = <&pinmux_ptp>;
 		pinctrl-names = "default";

boards/arm/mimxrt1064_evk/Kconfig.defconfig

@@ -43,6 +43,9 @@ if NETWORKING
 config NET_L2_ETHERNET
 	default y
 
+config ETH_MCUX_PHY_RESET
+	default y
+
 endif # NETWORKING
 
 if LVGL

boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts

@@ -252,6 +252,8 @@ arduino_serial: &lpuart3 {
 	status = "okay";
 	pinctrl-0 = <&pinmux_enet>;
 	pinctrl-names = "default";
+	int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 	ptp {
 		pinctrl-0 = <&pinmux_ptp>;
 		pinctrl-names = "default";

boards/arm/mimxrt1170_evk/Kconfig.defconfig

@@ -47,6 +47,9 @@ if NETWORKING
 config NET_L2_ETHERNET
 	default y if CPU_CORTEX_M7 # No cache memory support is required for driver
 
+config ETH_MCUX_PHY_RESET
+	default y
+
 endif # NETWORKING
 
 endif # BOARD_MIMXRT1170_EVK_CM7 || BOARD_MIMXRT1170_EVK_CM4

boards/arm/mimxrt1170_evk/mimxrt1170_evk_cm7.dts

@@ -128,6 +128,8 @@
 
 &enet {
 	status = "okay";
+	int-gpios = <&gpio9 11 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio12 12 GPIO_ACTIVE_HIGH>;
 	ptp {
 		status = "okay";
 	};

drivers/ethernet/Kconfig.mcux

@@ -55,6 +55,12 @@ config ETH_MCUX_RX_BUFFERS
 	help
 	  Set the number of RX buffers provided to the MCUX driver.
 
+config ETH_MCUX_PHY_RESET
+	bool "Reset the PHY at boot"
+	help
+	  Reset the ethernet PHY at boot. Requires dts properties int-gpios and
+	  reset-gpios to be present.
+
 config ETH_MCUX_TX_BUFFERS
 	int "Number of MCUX TX buffers"
 	default 1

drivers/ethernet/eth_mcux.c

@@ -49,6 +49,7 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
 #include <drivers/clock_control.h>
 #endif
 #include <devicetree.h>
+#include <drivers/gpio.h>
 #if defined(CONFIG_PINCTRL)
 #include <drivers/pinctrl.h>
 #endif
@@ -215,6 +216,10 @@ struct eth_context {
 #if defined(CONFIG_PINCTRL)
 	const struct pinctrl_dev_config *pincfg;
 #endif
+#if defined(CONFIG_ETH_MCUX_PHY_RESET)
+	const struct gpio_dt_spec int_gpio;
+	const struct gpio_dt_spec reset_gpio;
+#endif
 };
 
 /* Use ENET_FRAME_MAX_VLANFRAMELEN for VLAN frame size
@@ -1000,6 +1005,31 @@ static void eth_tx_thread(void *arg1, void *unused1, void *unused2)
 	}
 }
 
+
+#if defined(CONFIG_ETH_MCUX_PHY_RESET)
+static int eth_phy_reset(const struct device *dev)
+{
+	int err;
+	struct eth_context *context = dev->data;
+
+	/* pull up the ENET_INT before RESET. */
+	err =  gpio_pin_configure_dt(&context->int_gpio, GPIO_OUTPUT_ACTIVE);
+	if (err) {
+		return err;
+	}
+	return gpio_pin_configure_dt(&context->reset_gpio, GPIO_OUTPUT_INACTIVE);
+}
+
+static int eth_phy_init(const struct device *dev)
+{
+	struct eth_context *context = dev->data;
+
+	/* RESET PHY chip. */
+	k_busy_wait(USEC_PER_MSEC * 500);
+	return gpio_pin_set_dt(&context->reset_gpio, 1);
+}
+#endif
+
 static void eth_mcux_init(const struct device *dev)
 {
 	struct eth_context *context = dev->data;
@@ -1100,7 +1130,12 @@ static int eth_init(const struct device *dev)
 	struct eth_context *context = dev->data;
 #if defined(CONFIG_PINCTRL)
 	int err;
-#endif
+
+	err = pinctrl_apply_state(context->pincfg, PINCTRL_STATE_DEFAULT);
+	if (err) {
+		return err;
+	}
+#endif /* CONFIG_PINCTRL */
 
 #if defined(CONFIG_NET_POWER_MANAGEMENT)
 	const uint32_t inst = ENET_GetInstance(context->base);
@@ -1108,6 +1143,11 @@ static int eth_init(const struct device *dev)
 	context->clock = enet_clocks[inst];
 #endif
 
+#if defined(CONFIG_ETH_MCUX_PHY_RESET)
+	eth_phy_reset(dev);
+	eth_phy_init(dev);
+#endif
+
 #if defined(CONFIG_PTP_CLOCK_MCUX)
 	k_mutex_init(&context->ptp_mutex);
 #endif
@@ -1148,13 +1188,6 @@ static int eth_init(const struct device *dev)
 		context->mac_addr[2], context->mac_addr[3],
 		context->mac_addr[4], context->mac_addr[5]);
 
-#if defined(CONFIG_PINCTRL)
-	err = pinctrl_apply_state(context->pincfg, PINCTRL_STATE_DEFAULT);
-	if (err) {
-		return err;
-	}
-#endif /* CONFIG_PINCTRL */
-
 	return 0;
 }
 
@@ -1529,6 +1562,14 @@ static void eth_mcux_err_isr(const struct device *dev)
 #define ETH_MCUX_PINCTRL_INIT(n)
 #endif
 
+#if defined(CONFIG_ETH_MCUX_PHY_RESET)
+#define ETH_MCUX_PHY_GPIOS(n)						\
+	.int_gpio = GPIO_DT_SPEC_INST_GET(n, int_gpios),		\
+	.reset_gpio = GPIO_DT_SPEC_INST_GET(n, reset_gpios),
+#else
+#define ETH_MCUX_PHY_GPIOS(n)
+#endif
+
 #define ETH_MCUX_INIT(n)						\
 	ETH_MCUX_GEN_MAC(n)                                             \
 									\
@@ -1558,6 +1599,7 @@ static void eth_mcux_err_isr(const struct device *dev)
 		.tx_frame_buf = tx_enet_frame_##n##_buf,		\
 		.rx_frame_buf = rx_enet_frame_##n##_buf,		\
 		ETH_MCUX_PINCTRL_INIT(n)				\
+		ETH_MCUX_PHY_GPIOS(n)					\
 		ETH_MCUX_MAC_ADDR(n)					\
 		ETH_MCUX_POWER(n)					\
 	};								\

dts/bindings/ethernet/nxp,kinetis-ethernet.yaml

@@ -16,3 +16,12 @@ properties:
       type: int
       description: Address of the phy controller
       required: true
+    reset-gpios:
+      type: phandle-array
+      required: false
+      description: GPIO to reset PHY. Reset signal is assumed active low.
+    int-gpios:
+      type: phandle-array
+      required: false
+      description:
+        interrupt GPIO for PHY. Will be pulled high before reset is asserted.