arm: nrf: Add support for the nRF52811
This commit adds basic support for nrf52811 in the arch SoC, dts and nrfx folders. The nRF52811 is a Bluetooth 5.1 Direction Finding SoC with comprehensive protocol support. The nRF52811 SoC is capable of the latest features of Bluetooth 5.1, the most prominent being Direction Finding. The radio in the nRF52811 SoC has comprehensive protocol capabilities, including Bluetooth 5.1 Directing Finding, all Bluetooth 5 features, 802.15.4, Thread, Zigbee, ANT and 2.4 GHz proprietary. It has 4 dBm TX power and has been optimized to offer the best RX sensitivity of all SoCs in the nRF52 series. Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
This commit is contained in:
Jakub Rzeszutko
Carles Cufí
parent
fd97e44011
commit
0efddb63b7
8 changed files with 2801 additions and 0 deletions
224
dts/arm/nordic/nrf52811.dtsi
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224
dts/arm/nordic/nrf52811.dtsi
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@ -0,0 +1,224 @@
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/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "nrf5_common.dtsi"
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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flash-controller@4001E000 {
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compatible = "nordic,nrf52-flash-controller";
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reg = <0x4001E000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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label="NRF_FLASH_DRV_NAME";
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "NRF_FLASH";
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write-block-size = <4>;
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};
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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aliases {
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i2c-0 = &i2c0;
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spi-0 = &spi0;
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spi-1 = &spi1;
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uart-0 = &uart0;
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adc-0 = &adc;
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gpio-0 = &gpio0;
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gpiote-0 = &gpiote;
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wdt-0 = &wdt;
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pwm-0 = &pwm0;
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qdec-0 = &qdec;
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rtc-0 = &rtc0;
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rtc-1 = &rtc1;
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timer-0 = &timer0;
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timer-1 = &timer1;
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timer-2 = &timer2;
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};
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soc {
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adc: adc@40007000 {
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compatible = "nordic,nrf-saadc";
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reg = <0x40007000 0x1000>;
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interrupts = <7 1>;
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status = "disabled";
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label = "ADC_0";
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};
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clock: clock@40000000 {
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compatible = "nordic,nrf-clock";
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reg = <0x40000000 0x1000>;
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interrupts = <0 1>;
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status = "ok";
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label = "CLOCK";
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};
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uart0: uart@40002000 {
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/* uart can be either UART or UARTE, for the user to pick */
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/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
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reg = <0x40002000 0x1000>;
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interrupts = <2 1>;
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status = "disabled";
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label = "UART_0";
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};
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gpiote: gpiote@40006000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0x40006000 0x1000>;
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interrupts = <6 5>;
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status = "disabled";
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label = "GPIOTE_0";
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};
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gpio0: gpio@50000000 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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/* This way of addressing is used to be compatible */
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/* with nrf52840.dtsi */
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reg = <0x50000000 0x200
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0x50000500 0x300>;
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#gpio-cells = <2>;
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label = "GPIO_0";
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status = "disabled";
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};
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i2c0: i2c@40003000 {
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compatible = "nordic,nrf-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003000 0x1000>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <3 1>;
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status = "disabled";
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label = "I2C_0";
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};
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pwm0: pwm@4001c000 {
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compatible = "nordic,nrf-pwm";
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reg = <0x4001c000 0x1000>;
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interrupts = <28 1>;
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status = "disabled";
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label = "PWM_0";
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};
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qdec: qdec@40012000 {
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compatible = "nordic,nrf-qdec";
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reg = <0x40012000 0x1000>;
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interrupts = <18 1>;
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status = "disabled";
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label = "QDEC";
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};
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spi0: spi@40004000 {
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compatible = "nordic,nrf-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40004000 0x1000>;
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interrupts = <4 1>;
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status = "disabled";
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label = "SPI_0";
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};
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spi1: spi@40003000 {
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/* cannot be used with i2c0 */
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compatible = "nordic,nrf-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003000 0x1000>;
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interrupts = <3 1>;
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status = "disabled";
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label = "SPI_1";
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};
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rtc0: rtc@4000b000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x4000b000 0x1000>;
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interrupts = <11 1>;
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status = "ok";
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label = "RTC_0";
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};
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rtc1: rtc@40011000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x40011000 0x1000>;
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interrupts = <17 1>;
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status = "ok";
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label = "RTC_1";
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};
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timer0: timer@40008000 {
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compatible = "nordic,nrf-timer";
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status = "ok";
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reg = <0x40008000 0x1000>;
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interrupts = <8 1>;
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label = "TIMER_0";
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};
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timer1: timer@40009000 {
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compatible = "nordic,nrf-timer";
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status = "ok";
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reg = <0x40009000 0x1000>;
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interrupts = <9 1>;
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label = "TIMER_1";
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};
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timer2: timer@4000a000 {
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compatible = "nordic,nrf-timer";
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status = "ok";
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reg = <0x4000a000 0x1000>;
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interrupts = <10 1>;
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label = "TIMER_2";
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};
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temp: temp@4000c000 {
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compatible = "nordic,nrf-temp";
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reg = <0x4000c000 0x1000>;
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interrupts = <12 1>;
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status = "ok";
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label = "TEMP_0";
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};
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wdt: watchdog@40010000 {
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compatible = "nordic,nrf-watchdog";
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reg = <0x40010000 0x1000>;
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interrupts = <16 1>;
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status = "ok";
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label = "WDT";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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&sw_pwm {
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timer-instance = <2>;
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channel-count = <3>;
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clock-prescaler = <0>;
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ppi-base = <14>;
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gpiote-base = <0>;
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};
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22
dts/arm/nordic/nrf52811_qfaa.dtsi
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22
dts/arm/nordic/nrf52811_qfaa.dtsi
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@ -0,0 +1,22 @@
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/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <nordic/nrf52811.dtsi>
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&flash0 {
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reg = <0x00000000 DT_SIZE_K(192)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(24)>;
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};
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/ {
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soc {
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compatible = "nordic,nRF52811-QFAA", "nordic,nRF52811", "nordic,nRF52", "simple-bus";
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};
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};
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@ -12,6 +12,7 @@ if(CONFIG_HAS_NRFX)
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# Define MDK defines globally
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zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF51X NRF51)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52810 NRF52810_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52811 NRF52811_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52832 NRF52832_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52840 NRF52840_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9160 NRF9160_XXAA)
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@ -21,6 +22,7 @@ if(CONFIG_HAS_NRFX)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_NRF51X nrfx/mdk/system_nrf51.c)
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zephyr_sources_ifdef(CONFIG_SOC_NRF52810 nrfx/mdk/system_nrf52810.c)
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zephyr_sources_ifdef(CONFIG_SOC_NRF52811 nrfx/mdk/system_nrf52811.c)
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zephyr_sources_ifdef(CONFIG_SOC_NRF52832 nrfx/mdk/system_nrf52.c)
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zephyr_sources_ifdef(CONFIG_SOC_NRF52840 nrfx/mdk/system_nrf52840.c)
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zephyr_sources_ifdef(CONFIG_SOC_NRF9160 nrfx/mdk/system_nrf9160.c)
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@ -37,6 +37,8 @@
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#include <nrfx_config_nrf51.h>
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#elif defined(NRF52810_XXAA)
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#include <nrfx_config_nrf52810.h>
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#elif defined(NRF52811_XXAA)
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#include <nrfx_config_nrf52811.h>
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#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
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#include <nrfx_config_nrf52832.h>
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#elif defined(NRF52840_XXAA)
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2482
ext/hal/nordic/nrfx_config_nrf52811.h
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2482
ext/hal/nordic/nrfx_config_nrf52811.h
Normal file
File diff suppressed because it is too large
Load diff
19
soc/arm/nordic_nrf/nrf52/Kconfig.defconfig.nrf52811_QFAA
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19
soc/arm/nordic_nrf/nrf52/Kconfig.defconfig.nrf52811_QFAA
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# Kconfig.defconfig.nrf52811 - Nordic Semiconductor nRF52811 MCU
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#
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# Copyright (c) 2019 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_NRF52811_QFAA
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config SOC
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string
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default "nRF52811_QFAA"
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config NUM_IRQS
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int
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default 30
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endif # SOC_NRF52811_QFAA
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@ -46,6 +46,50 @@ config SOC_NRF52810
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_WDT
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config SOC_NRF52811
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depends on SOC_SERIES_NRF52X
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bool
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select HAS_HW_NRF_BPROT
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select HAS_HW_NRF_CCM
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select HAS_HW_NRF_CLOCK
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select HAS_HW_NRF_COMP
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select HAS_HW_NRF_ECB
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select HAS_HW_NRF_EGU0
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select HAS_HW_NRF_EGU1
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select HAS_HW_NRF_GPIO0
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select HAS_HW_NRF_GPIOTE
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select HAS_HW_NRF_PDM
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select HAS_HW_NRF_POWER
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select HAS_HW_NRF_PPI
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select HAS_HW_NRF_PWM0
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select HAS_HW_NRF_QDEC
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select HAS_HW_NRF_RNG
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select HAS_HW_NRF_RTC0
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select HAS_HW_NRF_RTC1
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select HAS_HW_NRF_SAADC
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select HAS_HW_NRF_SPI0
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select HAS_HW_NRF_SPIM0
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select HAS_HW_NRF_SPIS0
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select HAS_HW_NRF_SPI1
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select HAS_HW_NRF_SPIM1
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select HAS_HW_NRF_SPIS1
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select HAS_HW_NRF_SWI0
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select HAS_HW_NRF_SWI1
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select HAS_HW_NRF_SWI2
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select HAS_HW_NRF_SWI3
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select HAS_HW_NRF_SWI4
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select HAS_HW_NRF_SWI5
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select HAS_HW_NRF_TEMP
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select HAS_HW_NRF_TIMER0
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select HAS_HW_NRF_TIMER1
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select HAS_HW_NRF_TIMER2
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select HAS_HW_NRF_TWI0
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select HAS_HW_NRF_TWIM0
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select HAS_HW_NRF_TWIS0
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select HAS_HW_NRF_UART0
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_WDT
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config SOC_NRF52832
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depends on SOC_SERIES_NRF52X
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bool
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@ -190,6 +234,10 @@ config SOC_NRF52810_QFAA
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bool "NRF52810_QFAA"
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select SOC_NRF52810
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config SOC_NRF52811_QFAA
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bool "NRF52811_QFAA"
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select SOC_NRF52811
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config SOC_NRF52832_CIAA
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bool "NRF52832_CIAA"
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select SOC_NRF52832
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@ -29,6 +29,8 @@ extern void z_NmiInit(void);
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#if defined(CONFIG_SOC_NRF52810)
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#include <system_nrf52810.h>
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#elif defined(CONFIG_SOC_NRF52811)
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#include <system_nrf52811.h>
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#elif defined(CONFIG_SOC_NRF52832)
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#include <system_nrf52.h>
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#elif defined(CONFIG_SOC_NRF52840)
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