arm: nrf: Add support for the nRF52811

This commit adds basic support for nrf52811 in the arch SoC, dts
and nrfx folders.

The nRF52811 is a Bluetooth 5.1 Direction Finding SoC with comprehensive
protocol support.
The nRF52811 SoC is capable of the latest features of Bluetooth 5.1,
the most prominent being Direction Finding.

The radio in the nRF52811 SoC has comprehensive protocol capabilities,
including Bluetooth 5.1 Directing Finding, all Bluetooth 5 features,
802.15.4, Thread, Zigbee, ANT and 2.4 GHz proprietary.
It has 4 dBm TX power and has been optimized to offer the best RX
sensitivity of all SoCs in the nRF52 series.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>

dts/arm/nordic/nrf52811.dtsi

@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <arm/armv7-m.dtsi>
+#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "nrf5_common.dtsi"
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-m4";
+			reg = <0>;
+		};
+	};
+
+	flash-controller@4001E000 {
+			compatible = "nordic,nrf52-flash-controller";
+			reg = <0x4001E000 0x1000>;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			label="NRF_FLASH_DRV_NAME";
+
+			flash0: flash@0 {
+				compatible = "soc-nv-flash";
+				label = "NRF_FLASH";
+				write-block-size = <4>;
+			};
+	};
+
+	sram0: memory@20000000 {
+		device_type = "memory";
+		compatible = "mmio-sram";
+	};
+
+	aliases {
+		i2c-0 = &i2c0;
+		spi-0 = &spi0;
+		spi-1 = &spi1;
+		uart-0 = &uart0;
+		adc-0 = &adc;
+		gpio-0 = &gpio0;
+		gpiote-0 = &gpiote;
+		wdt-0 = &wdt;
+		pwm-0 = &pwm0;
+		qdec-0 = &qdec;
+		rtc-0 = &rtc0;
+		rtc-1 = &rtc1;
+		timer-0 = &timer0;
+		timer-1 = &timer1;
+		timer-2 = &timer2;
+	};
+
+	soc {
+		adc: adc@40007000 {
+			compatible = "nordic,nrf-saadc";
+			reg = <0x40007000 0x1000>;
+			interrupts = <7 1>;
+			status = "disabled";
+			label = "ADC_0";
+		};
+
+		clock: clock@40000000 {
+			compatible = "nordic,nrf-clock";
+			reg = <0x40000000 0x1000>;
+			interrupts = <0 1>;
+			status = "ok";
+			label = "CLOCK";
+		};
+
+		uart0: uart@40002000 {
+			/* uart can be either UART or UARTE, for the user to pick */
+			/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
+			reg = <0x40002000 0x1000>;
+			interrupts = <2 1>;
+			status = "disabled";
+			label = "UART_0";
+		};
+
+		gpiote: gpiote@40006000 {
+			compatible = "nordic,nrf-gpiote";
+			reg = <0x40006000 0x1000>;
+			interrupts = <6 5>;
+			status = "disabled";
+			label = "GPIOTE_0";
+		};
+
+		gpio0: gpio@50000000 {
+			compatible = "nordic,nrf-gpio";
+			gpio-controller;
+			/* This way of addressing is used to be compatible */
+			/* with nrf52840.dtsi */
+			reg = <0x50000000 0x200
+			       0x50000500 0x300>;
+			#gpio-cells = <2>;
+			label = "GPIO_0";
+			status = "disabled";
+		};
+
+		i2c0: i2c@40003000 {
+			compatible = "nordic,nrf-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40003000 0x1000>;
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			interrupts = <3 1>;
+			status = "disabled";
+			label = "I2C_0";
+		};
+
+		pwm0: pwm@4001c000 {
+			compatible = "nordic,nrf-pwm";
+			reg = <0x4001c000 0x1000>;
+			interrupts = <28 1>;
+			status = "disabled";
+			label = "PWM_0";
+		};
+
+		qdec: qdec@40012000 {
+			compatible = "nordic,nrf-qdec";
+			reg = <0x40012000 0x1000>;
+			interrupts = <18 1>;
+			status = "disabled";
+			label = "QDEC";
+		};
+
+		spi0: spi@40004000 {
+			compatible = "nordic,nrf-spi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40004000 0x1000>;
+			interrupts = <4 1>;
+			status = "disabled";
+			label = "SPI_0";
+		};
+
+		spi1: spi@40003000 {
+		/* cannot be used with i2c0 */
+			compatible = "nordic,nrf-spi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40003000 0x1000>;
+			interrupts = <3 1>;
+			status = "disabled";
+			label = "SPI_1";
+		};
+
+		rtc0: rtc@4000b000 {
+			compatible = "nordic,nrf-rtc";
+			reg = <0x4000b000 0x1000>;
+			interrupts = <11 1>;
+			status = "ok";
+			label = "RTC_0";
+		};
+
+		rtc1: rtc@40011000 {
+			compatible = "nordic,nrf-rtc";
+			reg = <0x40011000 0x1000>;
+			interrupts = <17 1>;
+			status = "ok";
+			label = "RTC_1";
+		};
+
+		timer0: timer@40008000 {
+			compatible = "nordic,nrf-timer";
+			status = "ok";
+			reg = <0x40008000 0x1000>;
+			interrupts = <8 1>;
+			label = "TIMER_0";
+		};
+
+		timer1: timer@40009000 {
+			compatible = "nordic,nrf-timer";
+			status = "ok";
+			reg = <0x40009000 0x1000>;
+			interrupts = <9 1>;
+			label = "TIMER_1";
+		};
+
+		timer2: timer@4000a000 {
+			compatible = "nordic,nrf-timer";
+			status = "ok";
+			reg = <0x4000a000 0x1000>;
+			interrupts = <10 1>;
+			label = "TIMER_2";
+		};
+
+		temp: temp@4000c000 {
+			compatible = "nordic,nrf-temp";
+			reg = <0x4000c000 0x1000>;
+			interrupts = <12 1>;
+			status = "ok";
+			label = "TEMP_0";
+		};
+
+		wdt: watchdog@40010000 {
+			compatible = "nordic,nrf-watchdog";
+			reg = <0x40010000 0x1000>;
+			interrupts = <16 1>;
+			status = "ok";
+			label = "WDT";
+		};
+	};
+};
+
+&nvic {
+	arm,num-irq-priority-bits = <3>;
+};
+
+&sw_pwm {
+	timer-instance = <2>;
+	channel-count = <3>;
+	clock-prescaler = <0>;
+	ppi-base = <14>;
+	gpiote-base = <0>;
+};

dts/arm/nordic/nrf52811_qfaa.dtsi

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <nordic/nrf52811.dtsi>
+
+&flash0 {
+	reg = <0x00000000 DT_SIZE_K(192)>;
+};
+
+&sram0 {
+	reg = <0x20000000 DT_SIZE_K(24)>;
+};
+
+/ {
+	soc {
+		compatible = "nordic,nRF52811-QFAA", "nordic,nRF52811", "nordic,nRF52", "simple-bus";
+	};
+};

ext/hal/nordic/CMakeLists.txt

@@ -12,6 +12,7 @@ if(CONFIG_HAS_NRFX)
   # Define MDK defines globally
   zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF51X NRF51)
   zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52810      NRF52810_XXAA)
+  zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52811      NRF52811_XXAA)
   zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52832      NRF52832_XXAA)
   zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF52840      NRF52840_XXAA)
   zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9160       NRF9160_XXAA)
@@ -21,6 +22,7 @@ if(CONFIG_HAS_NRFX)
 
   zephyr_sources_ifdef(CONFIG_SOC_SERIES_NRF51X nrfx/mdk/system_nrf51.c)
   zephyr_sources_ifdef(CONFIG_SOC_NRF52810      nrfx/mdk/system_nrf52810.c)
+  zephyr_sources_ifdef(CONFIG_SOC_NRF52811      nrfx/mdk/system_nrf52811.c)
   zephyr_sources_ifdef(CONFIG_SOC_NRF52832      nrfx/mdk/system_nrf52.c)
   zephyr_sources_ifdef(CONFIG_SOC_NRF52840      nrfx/mdk/system_nrf52840.c)
   zephyr_sources_ifdef(CONFIG_SOC_NRF9160       nrfx/mdk/system_nrf9160.c)

ext/hal/nordic/nrfx_config.h

@@ -37,6 +37,8 @@
     #include <nrfx_config_nrf51.h>
 #elif defined(NRF52810_XXAA)
     #include <nrfx_config_nrf52810.h>
+#elif defined(NRF52811_XXAA)
+    #include <nrfx_config_nrf52811.h>
 #elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
     #include <nrfx_config_nrf52832.h>
 #elif defined(NRF52840_XXAA)

soc/arm/nordic_nrf/nrf52/Kconfig.defconfig.nrf52811_QFAA

@@ -0,0 +1,19 @@
+# Kconfig.defconfig.nrf52811 - Nordic Semiconductor nRF52811 MCU
+#
+# Copyright (c) 2019 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+
+if SOC_NRF52811_QFAA
+
+config SOC
+	string
+	default "nRF52811_QFAA"
+
+config NUM_IRQS
+	int
+	default 30
+
+endif # SOC_NRF52811_QFAA

soc/arm/nordic_nrf/nrf52/Kconfig.soc

@@ -46,6 +46,50 @@ config SOC_NRF52810
 	select HAS_HW_NRF_UARTE0
 	select HAS_HW_NRF_WDT
 
+config SOC_NRF52811
+	depends on SOC_SERIES_NRF52X
+	bool
+	select HAS_HW_NRF_BPROT
+	select HAS_HW_NRF_CCM
+	select HAS_HW_NRF_CLOCK
+	select HAS_HW_NRF_COMP
+	select HAS_HW_NRF_ECB
+	select HAS_HW_NRF_EGU0
+	select HAS_HW_NRF_EGU1
+	select HAS_HW_NRF_GPIO0
+	select HAS_HW_NRF_GPIOTE
+	select HAS_HW_NRF_PDM
+	select HAS_HW_NRF_POWER
+	select HAS_HW_NRF_PPI
+	select HAS_HW_NRF_PWM0
+	select HAS_HW_NRF_QDEC
+	select HAS_HW_NRF_RNG
+	select HAS_HW_NRF_RTC0
+	select HAS_HW_NRF_RTC1
+	select HAS_HW_NRF_SAADC
+	select HAS_HW_NRF_SPI0
+	select HAS_HW_NRF_SPIM0
+	select HAS_HW_NRF_SPIS0
+	select HAS_HW_NRF_SPI1
+	select HAS_HW_NRF_SPIM1
+	select HAS_HW_NRF_SPIS1
+	select HAS_HW_NRF_SWI0
+	select HAS_HW_NRF_SWI1
+	select HAS_HW_NRF_SWI2
+	select HAS_HW_NRF_SWI3
+	select HAS_HW_NRF_SWI4
+	select HAS_HW_NRF_SWI5
+	select HAS_HW_NRF_TEMP
+	select HAS_HW_NRF_TIMER0
+	select HAS_HW_NRF_TIMER1
+	select HAS_HW_NRF_TIMER2
+	select HAS_HW_NRF_TWI0
+	select HAS_HW_NRF_TWIM0
+	select HAS_HW_NRF_TWIS0
+	select HAS_HW_NRF_UART0
+	select HAS_HW_NRF_UARTE0
+	select HAS_HW_NRF_WDT
+
 config SOC_NRF52832
 	depends on SOC_SERIES_NRF52X
 	bool
@@ -190,6 +234,10 @@ config SOC_NRF52810_QFAA
 	bool "NRF52810_QFAA"
 	select SOC_NRF52810
 
+config SOC_NRF52811_QFAA
+	bool "NRF52811_QFAA"
+	select SOC_NRF52811
+
 config SOC_NRF52832_CIAA
 	bool "NRF52832_CIAA"
 	select SOC_NRF52832

soc/arm/nordic_nrf/nrf52/soc.c

@@ -29,6 +29,8 @@ extern void z_NmiInit(void);
 
 #if defined(CONFIG_SOC_NRF52810)
 #include <system_nrf52810.h>
+#elif defined(CONFIG_SOC_NRF52811)
+#include <system_nrf52811.h>
 #elif defined(CONFIG_SOC_NRF52832)
 #include <system_nrf52.h>
 #elif defined(CONFIG_SOC_NRF52840)