From 0eee0a3c6c5ad8d5b10109d03de10ea21a2c6b1d Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Thu, 27 Jun 2019 11:38:40 -0400 Subject: [PATCH] drivers: apic_timer: fix include of system_timer.h Fix path for system_timer.h and loapic.h, we moved it to include/drivers/timer/ and include/drivers/interrupt_controller/ Signed-off-by: Anas Nashif --- drivers/timer/apic_timer.c | 6 +++--- include/arch/x86/msr.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/timer/apic_timer.c b/drivers/timer/apic_timer.c index 54093f3754b..736785287e1 100644 --- a/drivers/timer/apic_timer.c +++ b/drivers/timer/apic_timer.c @@ -3,10 +3,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include #include #include -#include +#include BUILD_ASSERT_MSG(!IS_ENABLED(CONFIG_SMP), "APIC timer doesn't support SMP"); @@ -40,7 +40,7 @@ BUILD_ASSERT_MSG(!IS_ENABLED(CONFIG_SMP), "APIC timer doesn't support SMP"); * found via CPUID 0x15 (n = EBX, m = EAX) on most CPUs. */ -/* These should be merged into include/drivers/loapic.h. */ +/* These should be merged into include/drivers/interrupt_controller/loapic.h. */ #define DCR_DIVIDER_MASK 0x0000000F /* divider bits */ #define DCR_DIVIDER 0x0000000B /* divide by 1 */ diff --git a/include/arch/x86/msr.h b/include/arch/x86/msr.h index 0101090e95e..920daa33889 100644 --- a/include/arch/x86/msr.h +++ b/include/arch/x86/msr.h @@ -241,7 +241,7 @@ * MSRs 0x0800 to 0x0BFF are reserved for x2APIC access. * * We only record the base address here, as the local APIC code - * knows how to find the registers, see include/drivers/loapic.h. + * knows how to find the registers, see include/drivers/interrupt_controller/loapic.h. */ #define X86_X2APIC_BASE_MSR 0x0800