boards: xiao_esp32c6: add multi-core support
ESP32-C6 now supports both HP and LP core app. This fixes and updates XIAO board to support that as well. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This commit is contained in:
parent
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11 changed files with 72 additions and 11 deletions
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@ -49,3 +49,6 @@ set(mimxrt1060_evkb_DEPRECATED
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set(neorv32_DEPRECATED
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set(neorv32_DEPRECATED
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neorv32/neorv32/up5kdemo
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neorv32/neorv32/up5kdemo
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)
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)
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set(xiao_esp32c6_DEPRECATED
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xiao_esp32c6/esp32c6/hpcore
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)
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@ -3,4 +3,5 @@
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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int
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int
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default 4096
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default 4096 if BOARD_XIAO_ESP32C6_ESP32C6_HPCORE
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default 256 if BOARD_XIAO_ESP32C6_ESP32C6_LPCORE
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@ -5,3 +5,5 @@
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config BOARD_XIAO_ESP32C6
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config BOARD_XIAO_ESP32C6
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select SOC_ESP32_C6_WROOM_1U_N4
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select SOC_ESP32_C6_WROOM_1U_N4
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select SOC_ESP32C6_HPCORE if BOARD_XIAO_ESP32C6_ESP32C6_HPCORE
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select SOC_ESP32C6_LPCORE if BOARD_XIAO_ESP32C6_ESP32C6_LPCORE
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@ -94,12 +94,12 @@ To build the sample application using sysbuild use the command:
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.. zephyr-app-commands::
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.. zephyr-app-commands::
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:tool: west
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:tool: west
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:zephyr-app: samples/hello_world
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:board: xiao_esp32c6/esp32c6/hpcore
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:goals: build
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:goals: build
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:west-args: --sysbuild
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:west-args: --sysbuild
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:compact:
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:compact:
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By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
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By default, the ESP32-C6 sysbuild creates bootloader (MCUboot) and application
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images. But it can be configured to create other kind of images.
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images. But it can be configured to create other kind of images.
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Build directory structure created by sysbuild is different from traditional
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Build directory structure created by sysbuild is different from traditional
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@ -143,7 +143,7 @@ Build and flash applications as usual (see :ref:`build_an_application` and
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.. zephyr-app-commands::
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:board: xiao_esp32c6/esp32c6/hpcore
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:goals: build
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:goals: build
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The usual ``flash`` target will work with the ``xiao_esp32c6`` board
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The usual ``flash`` target will work with the ``xiao_esp32c6`` board
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@ -152,7 +152,7 @@ application.
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.. zephyr-app-commands::
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:board: xiao_esp32c6/esp32c6/hpcore
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:goals: flash
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:goals: flash
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Since the Zephyr console is by default on the ``usb_serial`` device, we use
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Since the Zephyr console is by default on the ``usb_serial`` device, we use
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@ -168,7 +168,7 @@ message in the monitor:
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.. code-block:: console
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.. code-block:: console
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***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
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***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
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Hello World! xiao_esp32c6/esp32c6
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Hello World! xiao_esp32c6/esp32c6/hpcore
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Debugging
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Debugging
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*********
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*********
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@ -185,7 +185,7 @@ Here is an example for building the :zephyr:code-sample:`hello_world` applicatio
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.. zephyr-app-commands::
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:board: xiao_esp32c6/esp32c6/hpcore
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:goals: build flash
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:goals: build flash
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:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
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:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
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@ -193,7 +193,7 @@ You can debug an application in the usual way. Here is an example for the :zephy
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.. zephyr-app-commands::
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:board: xiao_esp32c6/esp32c6/hpcore
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:goals: debug
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:goals: debug
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References
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References
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@ -13,7 +13,7 @@
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#include "seeed_xiao_connector.dtsi"
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#include "seeed_xiao_connector.dtsi"
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/ {
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/ {
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model = "Seeed XIAO ESP32C6";
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model = "Seeed XIAO ESP32C6 HP Core";
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compatible = "seeed,xiao-esp32c6";
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compatible = "seeed,xiao-esp32c6";
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chosen {
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chosen {
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@ -1,5 +1,5 @@
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identifier: xiao_esp32c6
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identifier: xiao_esp32c6/esp32c6/hpcore
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name: XIAO ESP32C6
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name: XIAO ESP32C6 HP Core
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type: mcu
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type: mcu
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arch: riscv
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arch: riscv
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toolchain:
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toolchain:
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@ -18,5 +18,6 @@ supported:
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- xiao_spi
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- xiao_spi
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testing:
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testing:
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ignore_tags:
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ignore_tags:
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- bluetooth
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- tracing
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- tracing
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vendor: seeed
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vendor: seeed
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19
boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore.dts
Normal file
19
boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore.dts
Normal file
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@ -0,0 +1,19 @@
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/*
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* Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <espressif/esp32c6/esp32c6_lpcore_wroom_n4.dtsi>
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#include <espressif/partitions_0x0_default.dtsi>
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/ {
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model = "Seeed XIAO ESP32C6 LP Core";
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compatible = "seeed,xiao-esp32c6";
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chosen {
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zephyr,sram = &sramlp;
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zephyr,code-partition = &slot0_lpcore_partition;
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};
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};
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17
boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore.yaml
Normal file
17
boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore.yaml
Normal file
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@ -0,0 +1,17 @@
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identifier: xiao_esp32c6/esp32c6/lpcore
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name: XIAO ESP32C6 LP Core
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type: mcu
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arch: riscv
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toolchain:
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- zephyr
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supported:
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- cpu
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testing:
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only_tags:
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- introduction
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ignore_tags:
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- kernel
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- posix
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- chre
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- cpp
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vendor: seeed
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15
boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore_defconfig
Normal file
15
boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore_defconfig
Normal file
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@ -0,0 +1,15 @@
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# Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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# Memory protection
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CONFIG_THREAD_STACK_INFO=n
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CONFIG_THREAD_CUSTOM_DATA=n
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# Boot
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CONFIG_BOOT_BANNER=n
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# Console
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CONFIG_PRINTK=n
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# Build
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CONFIG_SIZE_OPTIMIZATIONS=y
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@ -89,6 +89,9 @@ Deprecated APIs and options
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* ``esp32c6_devkitc`` board target has been deprecated and renamed to
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* ``esp32c6_devkitc`` board target has been deprecated and renamed to
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``esp32c6_devkitc/esp32c6/hpcore``.
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``esp32c6_devkitc/esp32c6/hpcore``.
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* ``xiao_esp32c6`` board target has been deprecated and renamed to
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``xiao_esp32c6/esp32c6/hpcore``.
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New APIs and options
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New APIs and options
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====================
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====================
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