boards: xiao_esp32c6: add multi-core support

ESP32-C6 now supports both HP and LP core app.
This fixes and updates XIAO board to support that as well.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>

boards/deprecated.cmake

@@ -49,3 +49,6 @@ set(mimxrt1060_evkb_DEPRECATED
 set(neorv32_DEPRECATED
     neorv32/neorv32/up5kdemo
 )
+set(xiao_esp32c6_DEPRECATED
+    xiao_esp32c6/esp32c6/hpcore
+)

boards/seeed/xiao_esp32c6/Kconfig

@@ -3,4 +3,5 @@
 
 config HEAP_MEM_POOL_ADD_SIZE_BOARD
 	int
-	default 4096
+	default 4096 if BOARD_XIAO_ESP32C6_ESP32C6_HPCORE
+	default 256 if BOARD_XIAO_ESP32C6_ESP32C6_LPCORE

boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6

@@ -5,3 +5,5 @@
 
 config BOARD_XIAO_ESP32C6
 	select SOC_ESP32_C6_WROOM_1U_N4
+	select SOC_ESP32C6_HPCORE if BOARD_XIAO_ESP32C6_ESP32C6_HPCORE
+	select SOC_ESP32C6_LPCORE if BOARD_XIAO_ESP32C6_ESP32C6_LPCORE

boards/seeed/xiao_esp32c6/doc/index.rst

@@ -94,12 +94,12 @@ To build the sample application using sysbuild use the command:
 .. zephyr-app-commands::
    :tool: west
    :zephyr-app: samples/hello_world
-   :board: xiao_esp32c6
+   :board: xiao_esp32c6/esp32c6/hpcore
    :goals: build
    :west-args: --sysbuild
    :compact:
 
-By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
+By default, the ESP32-C6 sysbuild creates bootloader (MCUboot) and application
 images. But it can be configured to create other kind of images.
 
 Build directory structure created by sysbuild is different from traditional
@@ -143,7 +143,7 @@ Build and flash applications as usual (see :ref:`build_an_application` and
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: xiao_esp32c6
+   :board: xiao_esp32c6/esp32c6/hpcore
    :goals: build
 
 The usual ``flash`` target will work with the ``xiao_esp32c6`` board
@@ -152,7 +152,7 @@ application.
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: xiao_esp32c6
+   :board: xiao_esp32c6/esp32c6/hpcore
    :goals: flash
 
 Since the Zephyr console is by default on the ``usb_serial`` device, we use
@@ -168,7 +168,7 @@ message in the monitor:
 .. code-block:: console
 
    ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
-   Hello World! xiao_esp32c6/esp32c6
+   Hello World! xiao_esp32c6/esp32c6/hpcore
 
 Debugging
 *********
@@ -185,7 +185,7 @@ Here is an example for building the :zephyr:code-sample:`hello_world` applicatio
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: xiao_esp32c6
+   :board: xiao_esp32c6/esp32c6/hpcore
    :goals: build flash
    :gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
 
@@ -193,7 +193,7 @@ You can debug an application in the usual way. Here is an example for the :zephy
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: xiao_esp32c6
+   :board: xiao_esp32c6/esp32c6/hpcore
    :goals: debug
 
 References

boards/seeed/xiao_esp32c6/xiao_esp32c6_hpcore.dts

@@ -13,7 +13,7 @@
 #include "seeed_xiao_connector.dtsi"
 
 / {
-	model = "Seeed XIAO ESP32C6";
+	model = "Seeed XIAO ESP32C6 HP Core";
 	compatible = "seeed,xiao-esp32c6";
 
 	chosen {

boards/seeed/xiao_esp32c6/xiao_esp32c6_hpcore.yaml

@@ -1,5 +1,5 @@
-identifier: xiao_esp32c6
-name: XIAO ESP32C6
+identifier: xiao_esp32c6/esp32c6/hpcore
+name: XIAO ESP32C6 HP Core
 type: mcu
 arch: riscv
 toolchain:
@@ -18,5 +18,6 @@ supported:
   - xiao_spi
 testing:
   ignore_tags:
+    - bluetooth
     - tracing
 vendor: seeed

boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore.dts

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/dts-v1/;
+
+#include <espressif/esp32c6/esp32c6_lpcore_wroom_n4.dtsi>
+#include <espressif/partitions_0x0_default.dtsi>
+
+/ {
+	model = "Seeed XIAO ESP32C6 LP Core";
+	compatible = "seeed,xiao-esp32c6";
+
+	chosen {
+		zephyr,sram = &sramlp;
+		zephyr,code-partition = &slot0_lpcore_partition;
+	};
+};

boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore.yaml

@@ -0,0 +1,17 @@
+identifier: xiao_esp32c6/esp32c6/lpcore
+name: XIAO ESP32C6 LP Core
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+supported:
+  - cpu
+testing:
+  only_tags:
+    - introduction
+  ignore_tags:
+    - kernel
+    - posix
+    - chre
+    - cpp
+vendor: seeed

boards/seeed/xiao_esp32c6/xiao_esp32c6_lpcore_defconfig

@@ -0,0 +1,15 @@
+# Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
+# SPDX-License-Identifier: Apache-2.0
+
+# Memory protection
+CONFIG_THREAD_STACK_INFO=n
+CONFIG_THREAD_CUSTOM_DATA=n
+
+# Boot
+CONFIG_BOOT_BANNER=n
+
+# Console
+CONFIG_PRINTK=n
+
+# Build
+CONFIG_SIZE_OPTIMIZATIONS=y

doc/releases/release-notes-4.2.rst

@@ -89,6 +89,9 @@ Deprecated APIs and options
 * ``esp32c6_devkitc`` board target has been deprecated and renamed to
   ``esp32c6_devkitc/esp32c6/hpcore``.
 
+* ``xiao_esp32c6`` board target has been deprecated and renamed to
+  ``xiao_esp32c6/esp32c6/hpcore``.
+
 New APIs and options
 ====================