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kconfig: Rename CONFIG_FLOAT to CONFIG_FPU

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This commit renames the Kconfig `FLOAT` symbol to `FPU`, since this
symbol only indicates that the hardware Floating Point Unit (FPU) is
used and does not imply and/or indicate the general availability of
toolchain-level floating point support (i.e. this symbol is not
selected when building for an FPU-less platform that supports floating
point operations through the toolchain-provided software floating point
library).

Moreover, given that the symbol that indicates the availability of FPU
is named `CPU_HAS_FPU`, it only makes sense to use "FPU" in the name of
the symbol that enables the FPU.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2020-04-23 17:27:24 +09:00 • committed by Carles Cufí
commit 0e6ede8929
56 changed files with 114 additions and 115 deletions
Download patch file Download diff file Expand all files Collapse all files

4
arch/Kconfig
View file

@ -520,7 +520,7 @@ config MPU_GAP_FILLING
documentation for more information on how this option is documentation for more information on how this option is
used. used.
menuconfig FLOAT menuconfig FPU
bool "Floating point" bool "Floating point"
depends on CPU_HAS_FPU depends on CPU_HAS_FPU
depends on ARC || ARM || RISCV || X86 depends on ARC || ARM || RISCV || X86
@ -533,7 +533,7 @@ menuconfig FLOAT
config FP_SHARING config FP_SHARING
bool "Floating point register sharing" bool "Floating point register sharing"
depends on FLOAT depends on FPU
help help
This option allows multiple threads to use the floating point This option allows multiple threads to use the floating point
registers. registers.

2
arch/arc/Kconfig
View file

@ -211,7 +211,7 @@ config CODE_DENSITY
config ARC_HAS_ACCL_REGS config ARC_HAS_ACCL_REGS
bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)" bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
default y if FLOAT default y if FPU
help help
Depending on the configuration, CPU can contain accumulator reg-pair Depending on the configuration, CPU can contain accumulator reg-pair
(also referred to as r58:r59). These can also be used by gcc as GPR so (also referred to as r58:r59). These can also be used by gcc as GPR so

4
arch/arc/core/thread.c
View file

@ -274,7 +274,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
#endif #endif
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
int arch_float_disable(struct k_thread *thread) int arch_float_disable(struct k_thread *thread)
{ {
unsigned int key; unsigned int key;
@ -307,4 +307,4 @@ int arch_float_enable(struct k_thread *thread)
return 0; return 0;
} }
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */

2
arch/arm/core/aarch32/Kconfig
View file

@ -214,7 +214,7 @@ config ARM_NONSECURE_FIRMWARE
choice choice
prompt "Floating point ABI" prompt "Floating point ABI"
default FP_HARDABI default FP_HARDABI
depends on FLOAT depends on FPU
config FP_HARDABI config FP_HARDABI
bool "Floating point Hard ABI" bool "Floating point Hard ABI"

4
arch/arm/core/aarch32/cortex_a_r/reset.S
View file

@ -111,7 +111,7 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start)
mov r13, #0 /* r13_sys */ mov r13, #0 /* r13_sys */
mov r14, #0 /* r14_sys */ mov r14, #0 /* r14_sys */
#if defined(CONFIG_FLOAT) #if defined(CONFIG_FPU)
/* /*
* Initialise FPU registers to a defined state. * Initialise FPU registers to a defined state.
*/ */
@ -142,7 +142,7 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start)
fmdrr d13, r1, r1 fmdrr d13, r1, r1
fmdrr d14, r1, r1 fmdrr d14, r1, r1
fmdrr d15, r1, r1 fmdrr d15, r1, r1
#endif /* CONFIG_FLOAT */ #endif /* CONFIG_FPU */
#endif /* CONFIG_CPU_HAS_DCLS */ #endif /* CONFIG_CPU_HAS_DCLS */

2
arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c
View file

@ -215,7 +215,7 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread)
u32_t guard_start; u32_t guard_start;
u32_t guard_size = MPU_GUARD_ALIGN_AND_SIZE; u32_t guard_size = MPU_GUARD_ALIGN_AND_SIZE;
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
if ((thread->base.user_options & K_FP_REGS) != 0) { if ((thread->base.user_options & K_FP_REGS) != 0) {
guard_size = MPU_GUARD_ALIGN_AND_SIZE_FLOAT; guard_size = MPU_GUARD_ALIGN_AND_SIZE_FLOAT;
} }

2
arch/arm/core/aarch32/fatal.c
View file

@ -23,7 +23,7 @@ static void esf_dump(const z_arch_esf_t *esf)
LOG_ERR("r3/a4: 0x%08x r12/ip: 0x%08x r14/lr: 0x%08x", LOG_ERR("r3/a4: 0x%08x r12/ip: 0x%08x r14/lr: 0x%08x",
esf->basic.a4, esf->basic.ip, esf->basic.lr); esf->basic.a4, esf->basic.ip, esf->basic.lr);
LOG_ERR(" xpsr: 0x%08x", esf->basic.xpsr); LOG_ERR(" xpsr: 0x%08x", esf->basic.xpsr);
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
for (int i = 0; i < 16; i += 4) { for (int i = 0; i < 16; i += 4) {
LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x" LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x"
" s[%2d]: 0x%08x s[%2d]: 0x%08x", " s[%2d]: 0x%08x s[%2d]: 0x%08x",

6
arch/arm/core/aarch32/prep_c.c
View file

@ -86,7 +86,7 @@ static inline void z_arm_floating_point_init(void)
*/ */
SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk)); SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk));
#if defined(CONFIG_FLOAT) #if defined(CONFIG_FPU)
/* /*
* Enable CP10 and CP11 Co-Processors to enable access to floating * Enable CP10 and CP11 Co-Processors to enable access to floating
* point registers. * point registers.
@ -143,7 +143,7 @@ static inline void z_arm_floating_point_init(void)
* of floating point instructions. * of floating point instructions.
*/ */
#endif /* CONFIG_FLOAT */ #endif /* CONFIG_FPU */
/* /*
* Upon reset, the CONTROL.FPCA bit is, normally, cleared. However, * Upon reset, the CONTROL.FPCA bit is, normally, cleared. However,
@ -154,7 +154,7 @@ static inline void z_arm_floating_point_init(void)
* In Sharing FP Registers mode CONTROL.FPCA is cleared before switching * In Sharing FP Registers mode CONTROL.FPCA is cleared before switching
* to main, so it may be skipped here (saving few boot cycles). * to main, so it may be skipped here (saving few boot cycles).
*/ */
#if !defined(CONFIG_FLOAT) || !defined(CONFIG_FP_SHARING) #if !defined(CONFIG_FPU) || !defined(CONFIG_FP_SHARING)
__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk))); __set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
#endif #endif
} }

18
arch/arm/core/aarch32/thread.c
View file

@ -71,7 +71,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
stackSize -= MPU_GUARD_ALIGN_AND_SIZE; stackSize -= MPU_GUARD_ALIGN_AND_SIZE;
#endif #endif
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) \ #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) \
&& defined(CONFIG_MPU_STACK_GUARD) && defined(CONFIG_MPU_STACK_GUARD)
/* For a thread which intends to use the FP services, it is required to /* For a thread which intends to use the FP services, it is required to
* allocate a wider MPU guard region, to always successfully detect an * allocate a wider MPU guard region, to always successfully detect an
@ -166,13 +166,13 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
* privileged stack. Adjust the available (writable) stack * privileged stack. Adjust the available (writable) stack
* buffer area accordingly. * buffer area accordingly.
*/ */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
_current->arch.priv_stack_start += _current->arch.priv_stack_start +=
(_current->base.user_options & K_FP_REGS) ? (_current->base.user_options & K_FP_REGS) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else #else
_current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; _current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */ #endif /* CONFIG_MPU_STACK_GUARD */
z_arm_userspace_enter(user_entry, p1, p2, p3, z_arm_userspace_enter(user_entry, p1, p2, p3,
@ -285,12 +285,12 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp)
return 0; return 0;
} }
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
u32_t guard_len = (thread->base.user_options & K_FP_REGS) ? u32_t guard_len = (thread->base.user_options & K_FP_REGS) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else #else
u32_t guard_len = MPU_GUARD_ALIGN_AND_SIZE; u32_t guard_len = MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
#if defined(CONFIG_USERSPACE) #if defined(CONFIG_USERSPACE)
if (thread->arch.priv_stack_start) { if (thread->arch.priv_stack_start) {
@ -333,7 +333,7 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp)
} }
#endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */ #endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
int arch_float_disable(struct k_thread *thread) int arch_float_disable(struct k_thread *thread)
{ {
if (thread != _current) { if (thread != _current) {
@ -365,14 +365,14 @@ int arch_float_disable(struct k_thread *thread)
return 0; return 0;
} }
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
void arch_switch_to_main_thread(struct k_thread *main_thread, void arch_switch_to_main_thread(struct k_thread *main_thread,
k_thread_stack_t *main_stack, k_thread_stack_t *main_stack,
size_t main_stack_size, size_t main_stack_size,
k_thread_entry_t _main) k_thread_entry_t _main)
{ {
#if defined(CONFIG_FLOAT) #if defined(CONFIG_FPU)
/* Initialize the Floating Point Status and Control Register when in /* Initialize the Floating Point Status and Control Register when in
* Unshared FP Registers mode (In Shared FP Registers mode, FPSCR is * Unshared FP Registers mode (In Shared FP Registers mode, FPSCR is
* initialized at thread creation for threads that make use of the FP). * initialized at thread creation for threads that make use of the FP).
@ -383,7 +383,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread,
__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk))); __set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
__ISB(); __ISB();
#endif /* CONFIG_FP_SHARING */ #endif /* CONFIG_FP_SHARING */
#endif /* CONFIG_FLOAT */ #endif /* CONFIG_FPU */
#ifdef CONFIG_ARM_MPU #ifdef CONFIG_ARM_MPU
/* Configure static memory map. This will program MPU regions, /* Configure static memory map. This will program MPU regions,

6
arch/arm/core/offsets/offsets_aarch32.c
View file

@ -36,7 +36,7 @@ GEN_OFFSET_SYM(_thread_arch_t, priv_stack_start);
#endif #endif
#endif #endif
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
GEN_OFFSET_SYM(_thread_arch_t, preempt_float); GEN_OFFSET_SYM(_thread_arch_t, preempt_float);
#endif #endif
@ -49,7 +49,7 @@ GEN_OFFSET_SYM(_basic_sf_t, lr);
GEN_OFFSET_SYM(_basic_sf_t, pc); GEN_OFFSET_SYM(_basic_sf_t, pc);
GEN_OFFSET_SYM(_basic_sf_t, xpsr); GEN_OFFSET_SYM(_basic_sf_t, xpsr);
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
GEN_OFFSET_SYM(_esf_t, s); GEN_OFFSET_SYM(_esf_t, s);
GEN_OFFSET_SYM(_esf_t, fpscr); GEN_OFFSET_SYM(_esf_t, fpscr);
#endif #endif
@ -82,7 +82,7 @@ GEN_ABSOLUTE_SYM(___thread_stack_info_t_SIZEOF,
* point registers. * point registers.
*/ */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
GEN_ABSOLUTE_SYM(_K_THREAD_NO_FLOAT_SIZEOF, sizeof(struct k_thread) - GEN_ABSOLUTE_SYM(_K_THREAD_NO_FLOAT_SIZEOF, sizeof(struct k_thread) -
sizeof(struct _preempt_float)); sizeof(struct _preempt_float));
#else #else

2
arch/riscv/Kconfig
View file

@ -16,7 +16,7 @@ config COMPRESSED_ISA
config FLOAT_HARD config FLOAT_HARD
bool "Enable hard-float calling convention" bool "Enable hard-float calling convention"
default y default y
depends on FLOAT depends on FPU
select COMPRESSED_ISA select COMPRESSED_ISA
help help
This option enables the hard-float calling convention. This option enables the hard-float calling convention.

12
arch/riscv/core/isr.S
View file

@ -144,7 +144,7 @@ SECTION_FUNC(exception.entry, __irq_wrapper)
RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp) RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp)
RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp) RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp)
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Assess whether floating-point registers need to be saved. */ /* Assess whether floating-point registers need to be saved. */
la t0, _kernel la t0, _kernel
RV_OP_LOADREG t0, _kernel_offset_to_current(t0) RV_OP_LOADREG t0, _kernel_offset_to_current(t0)
@ -396,7 +396,7 @@ reschedule:
RV_OP_STOREREG s10, _thread_offset_to_s10(t1) RV_OP_STOREREG s10, _thread_offset_to_s10(t1)
RV_OP_STOREREG s11, _thread_offset_to_s11(t1) RV_OP_STOREREG s11, _thread_offset_to_s11(t1)
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Assess whether floating-point registers need to be saved. */ /* Assess whether floating-point registers need to be saved. */
RV_OP_LOADREG t2, _thread_offset_to_user_options(t1) RV_OP_LOADREG t2, _thread_offset_to_user_options(t1)
andi t2, t2, K_FP_REGS andi t2, t2, K_FP_REGS
@ -440,7 +440,7 @@ skip_store_fp_callee_saved:
RV_OP_LOADREG s10, _thread_offset_to_s10(t1) RV_OP_LOADREG s10, _thread_offset_to_s10(t1)
RV_OP_LOADREG s11, _thread_offset_to_s11(t1) RV_OP_LOADREG s11, _thread_offset_to_s11(t1)
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Determine if we need to restore floating-point registers. */ /* Determine if we need to restore floating-point registers. */
RV_OP_LOADREG t2, _thread_offset_to_user_options(t1) RV_OP_LOADREG t2, _thread_offset_to_user_options(t1)
andi t2, t2, K_FP_REGS andi t2, t2, K_FP_REGS
@ -482,7 +482,7 @@ skip_load_fp_callee_saved:
RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp) RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp)
RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp) RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp)
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Assess whether floating-point registers need to be saved. */ /* Assess whether floating-point registers need to be saved. */
RV_OP_LOADREG t2, _thread_offset_to_user_options(sp) RV_OP_LOADREG t2, _thread_offset_to_user_options(sp)
andi t2, t2, K_FP_REGS andi t2, t2, K_FP_REGS
@ -495,7 +495,7 @@ skip_store_fp_caller_saved_benchmark:
call read_timer_end_of_swap call read_timer_end_of_swap
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Determine if we need to restore floating-point registers. */ /* Determine if we need to restore floating-point registers. */
RV_OP_LOADREG t2, __z_arch_esf_t_fp_state_OFFSET(sp) RV_OP_LOADREG t2, __z_arch_esf_t_fp_state_OFFSET(sp)
beqz t2, skip_load_fp_caller_saved_benchmark beqz t2, skip_load_fp_caller_saved_benchmark
@ -542,7 +542,7 @@ no_reschedule:
RV_OP_LOADREG t0, __z_arch_esf_t_mstatus_OFFSET(sp) RV_OP_LOADREG t0, __z_arch_esf_t_mstatus_OFFSET(sp)
csrw mstatus, t0 csrw mstatus, t0
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* /*
* Determine if we need to restore floating-point registers. This needs * Determine if we need to restore floating-point registers. This needs
* to happen before restoring integer registers to avoid stomping on * to happen before restoring integer registers to avoid stomping on

4
arch/riscv/core/offsets/offsets.c
View file

@ -43,7 +43,7 @@ GEN_OFFSET_SYM(_callee_saved_t, s9);
GEN_OFFSET_SYM(_callee_saved_t, s10); GEN_OFFSET_SYM(_callee_saved_t, s10);
GEN_OFFSET_SYM(_callee_saved_t, s11); GEN_OFFSET_SYM(_callee_saved_t, s11);
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
GEN_OFFSET_SYM(_callee_saved_t, fcsr); GEN_OFFSET_SYM(_callee_saved_t, fcsr);
GEN_OFFSET_SYM(_callee_saved_t, fs0); GEN_OFFSET_SYM(_callee_saved_t, fs0);
GEN_OFFSET_SYM(_callee_saved_t, fs1); GEN_OFFSET_SYM(_callee_saved_t, fs1);
@ -82,7 +82,7 @@ GEN_OFFSET_SYM(z_arch_esf_t, a7);
GEN_OFFSET_SYM(z_arch_esf_t, mepc); GEN_OFFSET_SYM(z_arch_esf_t, mepc);
GEN_OFFSET_SYM(z_arch_esf_t, mstatus); GEN_OFFSET_SYM(z_arch_esf_t, mstatus);
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
GEN_OFFSET_SYM(z_arch_esf_t, fp_state); GEN_OFFSET_SYM(z_arch_esf_t, fp_state);
GEN_OFFSET_SYM(z_arch_esf_t, ft0); GEN_OFFSET_SYM(z_arch_esf_t, ft0);
GEN_OFFSET_SYM(z_arch_esf_t, ft1); GEN_OFFSET_SYM(z_arch_esf_t, ft1);

2
arch/riscv/core/reset.S
View file

@ -46,7 +46,7 @@ loop_slave_core:
boot_master_core: boot_master_core:
#ifdef CONFIG_FLOAT #ifdef CONFIG_FPU
/* /*
* Enable floating-point. * Enable floating-point.
*/ */

6
arch/riscv/core/thread.c
View file

@ -57,7 +57,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
* thread stack. * thread stack.
*/ */
stack_init->mstatus = MSTATUS_DEF_RESTORE; stack_init->mstatus = MSTATUS_DEF_RESTORE;
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
if ((thread->base.user_options & K_FP_REGS) != 0) { if ((thread->base.user_options & K_FP_REGS) != 0) {
stack_init->mstatus |= MSTATUS_FS_INIT; stack_init->mstatus |= MSTATUS_FS_INIT;
} }
@ -68,7 +68,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
thread->callee_saved.sp = (ulong_t)stack_init; thread->callee_saved.sp = (ulong_t)stack_init;
} }
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
int arch_float_disable(struct k_thread *thread) int arch_float_disable(struct k_thread *thread)
{ {
unsigned int key; unsigned int key;
@ -131,4 +131,4 @@ int arch_float_enable(struct k_thread *thread)
return 0; return 0;
} }
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */

4
arch/riscv/include/offsets_short_arch.h
View file

@ -59,7 +59,7 @@
#define _thread_offset_to_swap_return_value \ #define _thread_offset_to_swap_return_value \
(___thread_t_arch_OFFSET + ___thread_arch_t_swap_return_value_OFFSET) (___thread_t_arch_OFFSET + ___thread_arch_t_swap_return_value_OFFSET)
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
#define _thread_offset_to_fcsr \ #define _thread_offset_to_fcsr \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t_fcsr_OFFSET) (___thread_t_callee_saved_OFFSET + ___callee_saved_t_fcsr_OFFSET)
@ -100,7 +100,7 @@
#define _thread_offset_to_fs11 \ #define _thread_offset_to_fs11 \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t_fs11_OFFSET) (___thread_t_callee_saved_OFFSET + ___callee_saved_t_fs11_OFFSET)
#endif /* defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) */ #endif /* defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) */
/* end - threads */ /* end - threads */

8
arch/x86/core/Kconfig.ia32
View file

@ -80,7 +80,7 @@ depends on CPU_HAS_FPU
config SSE config SSE
bool "SSE registers" bool "SSE registers"
depends on FLOAT depends on FPU
help help
This option enables the use of SSE registers by threads. This option enables the use of SSE registers by threads.
@ -100,7 +100,7 @@ config SSE_FP_MATH
config EAGER_FP_SHARING config EAGER_FP_SHARING
bool bool
depends on FLOAT depends on FPU
depends on USERSPACE depends on USERSPACE
default y if !X86_NO_LAZY_FP default y if !X86_NO_LAZY_FP
help help
@ -110,12 +110,12 @@ config EAGER_FP_SHARING
Mitigates CVE-2018-3665, but incurs a performance hit. Mitigates CVE-2018-3665, but incurs a performance hit.
For vulnerable systems that process sensitive information in the For vulnerable systems that process sensitive information in the
FPU register set, should be used any time CONFIG_FLOAT is FPU register set, should be used any time CONFIG_FPU is
enabled, regardless if the FPU is used by one thread or multiple. enabled, regardless if the FPU is used by one thread or multiple.
config LAZY_FP_SHARING config LAZY_FP_SHARING
bool bool
depends on FLOAT depends on FPU
depends on !EAGER_FP_SHARING depends on !EAGER_FP_SHARING
depends on FP_SHARING depends on FP_SHARING
default y if X86_NO_LAZY_FP || !USERSPACE default y if X86_NO_LAZY_FP || !USERSPACE

4
arch/x86/core/ia32/crt0.S
View file

@ -85,7 +85,7 @@ __csSet:
#endif /* CONFIG_SET_GDT */ #endif /* CONFIG_SET_GDT */
#if !defined(CONFIG_FLOAT) #if !defined(CONFIG_FPU)
/* /*
* Force an #NM exception for floating point instructions * Force an #NM exception for floating point instructions
* since FP support hasn't been configured * since FP support hasn't been configured
@ -126,7 +126,7 @@ __csSet:
#endif /* CONFIG_SSE */ #endif /* CONFIG_SSE */
#endif /* !CONFIG_FLOAT */ #endif /* !CONFIG_FPU */
/* /*
* Set the stack pointer to the area used for the interrupt stack. * Set the stack pointer to the area used for the interrupt stack.

4
arch/x86/core/ia32/thread.c
View file

@ -45,7 +45,7 @@ extern void z_x86_syscall_entry_stub(void);
NANO_CPU_INT_REGISTER(z_x86_syscall_entry_stub, -1, -1, 0x80, 3); NANO_CPU_INT_REGISTER(z_x86_syscall_entry_stub, -1, -1, 0x80, 3);
#endif /* CONFIG_X86_USERSPACE */ #endif /* CONFIG_X86_USERSPACE */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
extern int z_float_disable(struct k_thread *thread); extern int z_float_disable(struct k_thread *thread);
@ -57,7 +57,7 @@ int arch_float_disable(struct k_thread *thread)
return -ENOSYS; return -ENOSYS;
#endif /* CONFIG_LAZY_FP_SHARING */ #endif /* CONFIG_LAZY_FP_SHARING */
} }
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
size_t stack_size, k_thread_entry_t entry, size_t stack_size, k_thread_entry_t entry,

2
boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl_defconfig
View file

@ -6,7 +6,7 @@ CONFIG_SOC_MSP432P401R=y
CONFIG_CORTEX_M_SYSTICK=y CONFIG_CORTEX_M_SYSTICK=y
# Floating point options # Floating point options
CONFIG_FLOAT=y CONFIG_FPU=y
# enable uart driver # enable uart driver
CONFIG_SERIAL=y CONFIG_SERIAL=y

2
boards/arm/stm32373c_eval/stm32373c_eval_defconfig
View file

@ -7,7 +7,7 @@ CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F373XC=y CONFIG_SOC_STM32F373XC=y
# Floating Point Options # Floating Point Options
CONFIG_FLOAT=y CONFIG_FPU=y
# General Kernel Options # General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

2
boards/arm/stm32f3_disco/stm32f3_disco_defconfig
View file

@ -6,7 +6,7 @@ CONFIG_SOC_STM32F303XC=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Floating Point Options # Floating Point Options
CONFIG_FLOAT=y CONFIG_FPU=y
# enable uart driver # enable uart driver
CONFIG_SERIAL=y CONFIG_SERIAL=y

2
cmake/compiler/gcc/target_arm.cmake
View file

@ -29,7 +29,7 @@ else()
set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16) set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16)
set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16) set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16)
if(CONFIG_FLOAT) if(CONFIG_FPU)
list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}})
list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}})
if (CONFIG_FP_SOFTABI) if (CONFIG_FP_SOFTABI)

2
cmake/compiler/gcc/target_riscv.cmake
View file

@ -12,7 +12,7 @@ else()
string(CONCAT riscv_march ${riscv_march} "32ima") string(CONCAT riscv_march ${riscv_march} "32ima")
endif() endif()
if(CONFIG_FLOAT) if(CONFIG_FPU)
if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION) if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION)
if(CONFIG_FLOAT_HARD) if(CONFIG_FLOAT_HARD)
string(CONCAT riscv_mabi ${riscv_mabi} "d") string(CONCAT riscv_mabi ${riscv_mabi} "d")

6
doc/guides/kconfig/setting.rst
View file

@ -30,7 +30,7 @@ between *visible* and *invisible* symbols.
.. code-block:: none .. code-block:: none
config FLOAT config FPU
bool "Support floating point operations" bool "Support floating point operations"
depends on HAS_FPU depends on HAS_FPU
@ -75,12 +75,12 @@ Assignments in configuration files use this syntax:
There should be no spaces around the equals sign. There should be no spaces around the equals sign.
``bool`` symbols can be enabled or disabled by setting them to ``y`` or ``n``, ``bool`` symbols can be enabled or disabled by setting them to ``y`` or ``n``,
respectively. The ``FLOAT`` symbol from the example above could be enabled like respectively. The ``FPU`` symbol from the example above could be enabled like
this: this:
.. code-block:: none .. code-block:: none
CONFIG_FLOAT=y CONFIG_FPU=y
.. note:: .. note::

4
doc/guides/kconfig/tips.rst
View file

@ -229,7 +229,7 @@ way, without having to look for particular architectures:
.. code-block:: none .. code-block:: none
config FLOAT config FPU
bool "Support floating point operations" bool "Support floating point operations"
depends on CPU_HAS_FPU depends on CPU_HAS_FPU
@ -238,7 +238,7 @@ duplicated in several spots:
.. code-block:: none .. code-block:: none
config FLOAT config FPU
bool "Support floating point operations" bool "Support floating point operations"
depends on SOC_FOO || SOC_BAR || ... depends on SOC_FOO || SOC_BAR || ...

4
doc/reference/kernel/other/float.rst
View file

@ -264,11 +264,11 @@ perform floating point operations.
Configuration Options Configuration Options
********************* *********************
To configure unshared FP registers mode, enable the :option:`CONFIG_FLOAT` To configure unshared FP registers mode, enable the :option:`CONFIG_FPU`
configuration option and leave the :option:`CONFIG_FP_SHARING` configuration configuration option and leave the :option:`CONFIG_FP_SHARING` configuration
option disabled. option disabled.
To configure shared FP registers mode, enable both the :option:`CONFIG_FLOAT` To configure shared FP registers mode, enable both the :option:`CONFIG_FPU`
configuration option and the :option:`CONFIG_FP_SHARING` configuration option. configuration option and the :option:`CONFIG_FP_SHARING` configuration option.
Also, ensure that any thread that uses the floating point registers has Also, ensure that any thread that uses the floating point registers has
sufficient added stack space for saving floating point register values sufficient added stack space for saving floating point register values

2
doc/zephyr.doxyfile.in
View file

@ -1967,7 +1967,7 @@ PREDEFINED = "CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT" \
"CONFIG_ERRNO" \ "CONFIG_ERRNO" \
"CONFIG_EXECUTION_BENCHMARKING" \ "CONFIG_EXECUTION_BENCHMARKING" \
"CONFIG_FLASH_PAGE_LAYOUT" \ "CONFIG_FLASH_PAGE_LAYOUT" \
"CONFIG_FLOAT" \ "CONFIG_FPU" \
"CONFIG_FP_SHARING" \ "CONFIG_FP_SHARING" \
"CONFIG_NET_L2_ETHERNET_MGMT" \ "CONFIG_NET_L2_ETHERNET_MGMT" \
"CONFIG_NET_MGMT_EVENT" \ "CONFIG_NET_MGMT_EVENT" \

2
include/arch/arm/aarch32/arch.h
View file

@ -129,7 +129,7 @@ extern "C" {
* upon exception entry. Therefore, a wide guard region is required to * upon exception entry. Therefore, a wide guard region is required to
* guarantee that stack-overflow detection will always be successful. * guarantee that stack-overflow detection will always be successful.
*/ */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) \ #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) \
&& defined(CONFIG_MPU_STACK_GUARD) && defined(CONFIG_MPU_STACK_GUARD)
#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT #define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT
#else #else

2
include/arch/arm/aarch32/exc.h
View file

@ -84,7 +84,7 @@ struct __esf {
sys_define_gpr_with_alias(pc, r15); sys_define_gpr_with_alias(pc, r15);
u32_t xpsr; u32_t xpsr;
} basic; } basic;
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
float s[16]; float s[16];
u32_t fpscr; u32_t fpscr;
u32_t undefined; u32_t undefined;

4
include/arch/arm/aarch32/thread.h
View file

@ -36,7 +36,7 @@ struct _callee_saved {
typedef struct _callee_saved _callee_saved_t; typedef struct _callee_saved _callee_saved_t;
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
struct _preempt_float { struct _preempt_float {
float s16; float s16;
float s17; float s17;
@ -65,7 +65,7 @@ struct _thread_arch {
/* r0 in stack frame cannot be written to reliably */ /* r0 in stack frame cannot be written to reliably */
u32_t swap_return_value; u32_t swap_return_value;
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* /*
* No cooperative floating point register set structure exists for * No cooperative floating point register set structure exists for
* the Cortex-M as it automatically saves the necessary registers * the Cortex-M as it automatically saves the necessary registers

4
include/arch/riscv/exp.h
View file

@ -41,7 +41,7 @@ struct soc_esf {
}; };
#endif #endif
#if !defined(RV_FP_TYPE) && defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if !defined(RV_FP_TYPE) && defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
#ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
#define RV_FP_TYPE u64_t #define RV_FP_TYPE u64_t
#else #else
@ -74,7 +74,7 @@ struct __esf {
ulong_t mepc; /* machine exception program counter */ ulong_t mepc; /* machine exception program counter */
ulong_t mstatus; /* machine status register */ ulong_t mstatus; /* machine status register */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
ulong_t fp_state; /* Floating-point saved context state. */ ulong_t fp_state; /* Floating-point saved context state. */
RV_FP_TYPE ft0; /* Caller-saved temporary floating register */ RV_FP_TYPE ft0; /* Caller-saved temporary floating register */
RV_FP_TYPE ft1; /* Caller-saved temporary floating register */ RV_FP_TYPE ft1; /* Caller-saved temporary floating register */

4
include/arch/riscv/thread.h
View file

@ -22,7 +22,7 @@
#ifndef _ASMLANGUAGE #ifndef _ASMLANGUAGE
#include <zephyr/types.h> #include <zephyr/types.h>
#if !defined(RV_FP_TYPE) && defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if !defined(RV_FP_TYPE) && defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
#ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
#define RV_FP_TYPE u64_t #define RV_FP_TYPE u64_t
#else #else
@ -50,7 +50,7 @@ struct _callee_saved {
ulong_t s10; /* saved register */ ulong_t s10; /* saved register */
ulong_t s11; /* saved register */ ulong_t s11; /* saved register */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
u32_t fcsr; /* Control and status register */ u32_t fcsr; /* Control and status register */
RV_FP_TYPE fs0; /* saved floating-point register */ RV_FP_TYPE fs0; /* saved floating-point register */
RV_FP_TYPE fs1; /* saved floating-point register */ RV_FP_TYPE fs1; /* saved floating-point register */

4
kernel/include/kernel_arch_interface.h
View file

@ -165,7 +165,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread,
k_thread_entry_t _main); k_thread_entry_t _main);
#endif /* CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN */ #endif /* CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/** /**
* @brief Disable floating point context preservation * @brief Disable floating point context preservation
* *
@ -179,7 +179,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread,
* @retval -EINVAL If the floating point disabling could not be performed. * @retval -EINVAL If the floating point disabling could not be performed.
*/ */
int arch_float_disable(struct k_thread *thread); int arch_float_disable(struct k_thread *thread);
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
/** @} */ /** @} */

4
kernel/thread.c
View file

@ -805,11 +805,11 @@ void z_spin_lock_set_owner(struct k_spinlock *l)
int z_impl_k_float_disable(struct k_thread *thread) int z_impl_k_float_disable(struct k_thread *thread)
{ {
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
return arch_float_disable(thread); return arch_float_disable(thread);
#else #else
return -ENOSYS; return -ENOSYS;
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
} }
#ifdef CONFIG_USERSPACE #ifdef CONFIG_USERSPACE

2
samples/basic/minimal/common.conf
View file

@ -17,7 +17,7 @@ CONFIG_IRQ_OFFLOAD=n
# Memory protection # Memory protection
CONFIG_THREAD_STACK_INFO=n CONFIG_THREAD_STACK_INFO=n
CONFIG_THREAD_CUSTOM_DATA=n CONFIG_THREAD_CUSTOM_DATA=n
CONFIG_FLOAT=n CONFIG_FPU=n
# Boot # Boot
CONFIG_BOOT_BANNER=n CONFIG_BOOT_BANNER=n

2
soc/arc/snps_arc_hsdk/CMakeLists.txt
View file

@ -6,7 +6,7 @@ zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
# -mswap -mnorm -mll64 -mmpy-option=9 -mfpu=fpud_all # -mswap -mnorm -mll64 -mmpy-option=9 -mfpu=fpud_all
zephyr_cc_option(-mcpu=${GCC_M_CPU}) zephyr_cc_option(-mcpu=${GCC_M_CPU})
zephyr_cc_option(-mno-sdata) zephyr_cc_option(-mno-sdata)
zephyr_cc_option_ifdef(CONFIG_FLOAT -mfpu=fpud_all) zephyr_cc_option_ifdef(CONFIG_FPU -mfpu=fpud_all)
zephyr_sources( zephyr_sources(
soc.c soc.c

2
soc/arc/snps_arc_iot/CMakeLists.txt
View file

@ -1,6 +1,6 @@
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata -mmpy-option=6) zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata -mmpy-option=6)
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all)
zephyr_sources( zephyr_sources(
soc.c soc.c

5
soc/arc/snps_emsdp/CMakeLists.txt
View file

@ -13,9 +13,8 @@ elseif(CONFIG_SOC_EMSDP_EM7D_ESP)
zephyr_compile_options(-mmpy-option=6) zephyr_compile_options(-mmpy-option=6)
elseif(CONFIG_SOC_EMSDP_EM9D) elseif(CONFIG_SOC_EMSDP_EM9D)
zephyr_compile_options(-mmpy-option=6) zephyr_compile_options(-mmpy-option=6)
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpus_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpus_all)
elseif(CONFIG_SOC_EMSDP_EM11D) elseif(CONFIG_SOC_EMSDP_EM11D)
zephyr_compile_options(-mmpy-option=6) zephyr_compile_options(-mmpy-option=6)
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all)
endif() endif()

4
soc/arc/snps_emsk/CMakeLists.txt
View file

@ -2,9 +2,9 @@
zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata -mmpy-option=6) zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata -mmpy-option=6)
if(CONFIG_SOC_EMSK_EM9D) if(CONFIG_SOC_EMSK_EM9D)
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpus_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpus_all)
elseif(CONFIG_SOC_EMSK_EM11D) elseif(CONFIG_SOC_EMSK_EM11D)
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all)
endif() endif()
zephyr_sources( zephyr_sources(

4
soc/arc/snps_nsim/CMakeLists.txt
View file

@ -3,9 +3,9 @@ zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata)
zephyr_compile_options_ifdef(CONFIG_CPU_ARCEM -mmpy-option=wlh1) zephyr_compile_options_ifdef(CONFIG_CPU_ARCEM -mmpy-option=wlh1)
zephyr_compile_options_ifdef(CONFIG_CPU_ARCHS -mmpy-option=plus_qmacw) zephyr_compile_options_ifdef(CONFIG_CPU_ARCHS -mmpy-option=plus_qmacw)
if(CONFIG_CPU_ARCHS) if(CONFIG_CPU_ARCHS)
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpud_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpud_all)
else() else()
zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all)
endif() endif()
zephyr_sources( zephyr_sources(

2
soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4
View file

@ -8,7 +8,7 @@ if SOC_MCIMX6X_M4
config SOC config SOC
default "mcimx6x" default "mcimx6x"
config FLOAT config FPU
default y default y
config GPIO_IMX config GPIO_IMX

4
subsys/debug/openocd.c
View file

@ -78,11 +78,11 @@ size_t _kernel_openocd_offsets[] = {
[OPENOCD_OFFSET_T_NAME] = offsetof(struct k_thread, name), [OPENOCD_OFFSET_T_NAME] = offsetof(struct k_thread, name),
[OPENOCD_OFFSET_T_ARCH] = offsetof(struct k_thread, arch), [OPENOCD_OFFSET_T_ARCH] = offsetof(struct k_thread, arch),
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) && defined(CONFIG_ARM) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) && defined(CONFIG_ARM)
[OPENOCD_OFFSET_T_PREEMPT_FLOAT] = offsetof(struct _thread_arch, [OPENOCD_OFFSET_T_PREEMPT_FLOAT] = offsetof(struct _thread_arch,
preempt_float), preempt_float),
[OPENOCD_OFFSET_T_COOP_FLOAT] = OPENOCD_UNIMPLEMENTED, [OPENOCD_OFFSET_T_COOP_FLOAT] = OPENOCD_UNIMPLEMENTED,
#elif defined(CONFIG_FLOAT) && defined(CONFIG_X86) #elif defined(CONFIG_FPU) && defined(CONFIG_X86)
#if defined(CONFIG_X86_64) #if defined(CONFIG_X86_64)
[OPENOCD_OFFSET_T_PREEMPT_FLOAT] = offsetof(struct _thread_arch, sse), [OPENOCD_OFFSET_T_PREEMPT_FLOAT] = offsetof(struct _thread_arch, sse),
#else #else

8
subsys/net/ip/net_shell.c
View file

@ -2895,7 +2895,7 @@ static enum net_verdict handle_ipv6_echo_reply(struct net_pkt *pkt,
#ifdef CONFIG_IEEE802154 #ifdef CONFIG_IEEE802154
"rssi=%d " "rssi=%d "
#endif #endif
#ifdef CONFIG_FLOAT #ifdef CONFIG_FPU
"time=%.2f ms\n", "time=%.2f ms\n",
#else #else
"time=%d ms\n", "time=%d ms\n",
@ -2909,7 +2909,7 @@ static enum net_verdict handle_ipv6_echo_reply(struct net_pkt *pkt,
#ifdef CONFIG_IEEE802154 #ifdef CONFIG_IEEE802154
net_pkt_ieee802154_rssi(pkt), net_pkt_ieee802154_rssi(pkt),
#endif #endif
#ifdef CONFIG_FLOAT #ifdef CONFIG_FPU
((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000.f)); ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000.f));
#else #else
((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000)); ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000));
@ -3022,7 +3022,7 @@ static enum net_verdict handle_ipv4_echo_reply(struct net_pkt *pkt,
cycles = k_cycle_get_32() - cycles; cycles = k_cycle_get_32() - cycles;
PR_SHELL(shell_for_ping, "%d bytes from %s to %s: icmp_seq=%d ttl=%d " PR_SHELL(shell_for_ping, "%d bytes from %s to %s: icmp_seq=%d ttl=%d "
#ifdef CONFIG_FLOAT #ifdef CONFIG_FPU
"time=%.2f ms\n", "time=%.2f ms\n",
#else #else
"time=%d ms\n", "time=%d ms\n",
@ -3033,7 +3033,7 @@ static enum net_verdict handle_ipv4_echo_reply(struct net_pkt *pkt,
net_sprint_ipv4_addr(&ip_hdr->dst), net_sprint_ipv4_addr(&ip_hdr->dst),
ntohs(icmp_echo->sequence), ntohs(icmp_echo->sequence),
ip_hdr->ttl, ip_hdr->ttl,
#ifdef CONFIG_FLOAT #ifdef CONFIG_FPU
((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000.f)); ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000.f));
#else #else
((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000)); ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000));

18
tests/arch/arm/arm_thread_swap/src/arm_thread_arch.c
View file

@ -110,7 +110,7 @@ static void verify_callee_saved(const _callee_saved_t *src,
); );
} }
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Arbitrary values for the floating-point callee-saved registers */ /* Arbitrary values for the floating-point callee-saved registers */
struct _preempt_float ztest_thread_fp_callee_saved_regs = { struct _preempt_float ztest_thread_fp_callee_saved_regs = {
.s16 = 0x11111111, .s17 = 0x22222222, .s16 = 0x11111111, .s17 = 0x22222222,
@ -194,7 +194,7 @@ static void verify_fp_callee_saved(const struct _preempt_float *src,
); );
} }
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
static void alt_thread_entry(void) static void alt_thread_entry(void)
{ {
@ -239,7 +239,7 @@ static void alt_thread_entry(void)
memset(&ztest_thread_callee_saved_regs_container, memset(&ztest_thread_callee_saved_regs_container,
0, sizeof(_callee_saved_t)); 0, sizeof(_callee_saved_t));
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Verify that the _current_ (alt) thread is initialized with FPCA cleared. */ /* Verify that the _current_ (alt) thread is initialized with FPCA cleared. */
zassert_true((__get_CONTROL() & CONTROL_FPCA_Msk) == 0, zassert_true((__get_CONTROL() & CONTROL_FPCA_Msk) == 0,
@ -268,7 +268,7 @@ static void alt_thread_entry(void)
memset(&ztest_thread_fp_callee_saved_regs, memset(&ztest_thread_fp_callee_saved_regs,
0, sizeof(ztest_thread_fp_callee_saved_regs)); 0, sizeof(ztest_thread_fp_callee_saved_regs));
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
/* Modify the arch.basepri flag of the main test thread, to verify, /* Modify the arch.basepri flag of the main test thread, to verify,
* later, that this is passed properly to the BASEPRI. * later, that this is passed properly to the BASEPRI.
@ -341,7 +341,7 @@ void test_arm_thread_swap(void)
* Simulating initial conditions: * Simulating initial conditions:
* - set arbitrary values at the callee-saved registers * - set arbitrary values at the callee-saved registers
* - set arbitrary values at the FP callee-saved registers, * - set arbitrary values at the FP callee-saved registers,
* if building with CONFIG_FLOAT/CONFIG_FP_SHARING * if building with CONFIG_FPU/CONFIG_FP_SHARING
* - zero the thread's callee-saved data structure * - zero the thread's callee-saved data structure
* - set thread's priority same as the alternative test thread * - set thread's priority same as the alternative test thread
*/ */
@ -389,7 +389,7 @@ void test_arm_thread_swap(void)
_current->arch.mode); _current->arch.mode);
#endif /* CONFIG_USERSPACE */ #endif /* CONFIG_USERSPACE */
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* The main test thread is not (yet) actively using the FP registers */ /* The main test thread is not (yet) actively using the FP registers */
zassert_true((_current->arch.mode & CONTROL_FPCA_Msk) == 0, zassert_true((_current->arch.mode & CONTROL_FPCA_Msk) == 0,
"Thread FPCA flag not clear at initialization 0x%0x\n", "Thread FPCA flag not clear at initialization 0x%0x\n",
@ -422,7 +422,7 @@ void test_arm_thread_swap(void)
*/ */
zassert_true((_current->arch.mode & CONTROL_FPCA_Msk) == 0, zassert_true((_current->arch.mode & CONTROL_FPCA_Msk) == 0,
"Thread FPCA flag not clear at initialization\n"); "Thread FPCA flag not clear at initialization\n");
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
/* Create an alternative (supervisor) testing thread */ /* Create an alternative (supervisor) testing thread */
k_thread_create(&alt_thread, k_thread_create(&alt_thread,
@ -611,7 +611,7 @@ void test_arm_thread_swap(void)
_current->arch.swap_return_value, ztest_swap_return_val); _current->arch.swap_return_value, ztest_swap_return_val);
#endif #endif
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
/* Dump callee-saved registers to memory. */ /* Dump callee-saved registers to memory. */
__asm__ volatile ( __asm__ volatile (
"vstmia %0, {s16-s31};\n\t" "vstmia %0, {s16-s31};\n\t"
@ -632,7 +632,7 @@ void test_arm_thread_swap(void)
zassert_true((__get_FPSCR() & 0x1) == 0x1, zassert_true((__get_FPSCR() & 0x1) == 0x1,
"FPSCR bit-0 not restored at swap: 0x%x\n", __get_FPSCR()); "FPSCR bit-0 not restored at swap: 0x%x\n", __get_FPSCR());
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
} }
/** /**

4
tests/arch/arm/arm_thread_swap/testcase.yaml
View file

@ -15,14 +15,14 @@ tests:
arch_whitelist: arm arch_whitelist: arm
filter: CONFIG_ARMV7_M_ARMV8_M_FP filter: CONFIG_ARMV7_M_ARMV8_M_FP
extra_configs: extra_configs:
- CONFIG_FLOAT=y - CONFIG_FPU=y
- CONFIG_FP_SHARING=y - CONFIG_FP_SHARING=y
tags: arm tags: arm
arch.arm.swap.common.fp_sharing.no_optimizations: arch.arm.swap.common.fp_sharing.no_optimizations:
arch_whitelist: arm arch_whitelist: arm
filter: CONFIG_ARMV7_M_ARMV8_M_FP filter: CONFIG_ARMV7_M_ARMV8_M_FP
extra_configs: extra_configs:
- CONFIG_FLOAT=y - CONFIG_FPU=y
- CONFIG_FP_SHARING=y - CONFIG_FP_SHARING=y
- CONFIG_NO_OPTIMIZATIONS=y - CONFIG_NO_OPTIMIZATIONS=y
- CONFIG_IDLE_STACK_SIZE=512 - CONFIG_IDLE_STACK_SIZE=512

2
tests/benchmarks/app_kernel/prj_fp.conf
View file

@ -3,7 +3,7 @@ CONFIG_TEST=y
CONFIG_STDOUT_CONSOLE=y CONFIG_STDOUT_CONSOLE=y
CONFIG_MAIN_THREAD_PRIORITY=6 CONFIG_MAIN_THREAD_PRIORITY=6
CONFIG_FLOAT=y CONFIG_FPU=y
CONFIG_SSE=y CONFIG_SSE=y
CONFIG_FP_SHARING=y CONFIG_FP_SHARING=y
CONFIG_SSE_FP_MATH=y CONFIG_SSE_FP_MATH=y

2
tests/kernel/fatal/prj_arm_fp_sharing.conf
View file

@ -1,4 +1,4 @@
CONFIG_FLOAT=y CONFIG_FPU=y
CONFIG_FP_SHARING=y CONFIG_FP_SHARING=y
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_COVERAGE=n CONFIG_COVERAGE=n

8
tests/kernel/fatal/src/main.c
View file

@ -341,13 +341,13 @@ void test_fatal(void)
TC_PRINT("test stack HW-based overflow - supervisor 2\n"); TC_PRINT("test stack HW-based overflow - supervisor 2\n");
check_stack_overflow(stack_hw_overflow, 0); check_stack_overflow(stack_hw_overflow, 0);
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
TC_PRINT("test stack HW-based overflow (FPU thread) - supervisor 1\n"); TC_PRINT("test stack HW-based overflow (FPU thread) - supervisor 1\n");
check_stack_overflow(stack_hw_overflow, K_FP_REGS); check_stack_overflow(stack_hw_overflow, K_FP_REGS);
TC_PRINT("test stack HW-based overflow (FPU thread) - supervisor 2\n"); TC_PRINT("test stack HW-based overflow (FPU thread) - supervisor 2\n");
check_stack_overflow(stack_hw_overflow, K_FP_REGS); check_stack_overflow(stack_hw_overflow, K_FP_REGS);
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
#endif /* CONFIG_HW_STACK_PROTECTION */ #endif /* CONFIG_HW_STACK_PROTECTION */
@ -365,13 +365,13 @@ void test_fatal(void)
TC_PRINT("test stack HW-based overflow - user priv stack 2\n"); TC_PRINT("test stack HW-based overflow - user priv stack 2\n");
check_stack_overflow(user_priv_stack_hw_overflow, K_USER); check_stack_overflow(user_priv_stack_hw_overflow, K_USER);
#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) #if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
TC_PRINT("test stack HW-based overflow (FPU thread) - user 1\n"); TC_PRINT("test stack HW-based overflow (FPU thread) - user 1\n");
check_stack_overflow(stack_hw_overflow, K_USER | K_FP_REGS); check_stack_overflow(stack_hw_overflow, K_USER | K_FP_REGS);
TC_PRINT("test stack HW-based overflow (FPU thread) - user 2\n"); TC_PRINT("test stack HW-based overflow (FPU thread) - user 2\n");
check_stack_overflow(stack_hw_overflow, K_USER | K_FP_REGS); check_stack_overflow(stack_hw_overflow, K_USER | K_FP_REGS);
#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ #endif /* CONFIG_FPU && CONFIG_FP_SHARING */
#endif /* CONFIG_USERSPACE */ #endif /* CONFIG_USERSPACE */

2
tests/kernel/fp_sharing/float_disable/prj.conf
View file

@ -1,4 +1,4 @@
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_TEST_USERSPACE=y CONFIG_TEST_USERSPACE=y
CONFIG_FLOAT=y CONFIG_FPU=y
CONFIG_FP_SHARING=y CONFIG_FP_SHARING=y

2
tests/kernel/fp_sharing/float_disable/prj_x86.conf
View file

@ -1,6 +1,6 @@
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_TEST_USERSPACE=y CONFIG_TEST_USERSPACE=y
CONFIG_FLOAT=y CONFIG_FPU=y
CONFIG_FP_SHARING=y CONFIG_FP_SHARING=y
CONFIG_SSE=y CONFIG_SSE=y
CONFIG_SSE_FP_MATH=y CONFIG_SSE_FP_MATH=y

2
tests/kernel/fp_sharing/generic/prj.conf
View file

@ -1,4 +1,4 @@
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_FLOAT=y CONFIG_FPU=y
CONFIG_FP_SHARING=y CONFIG_FP_SHARING=y
CONFIG_STDOUT_CONSOLE=y CONFIG_STDOUT_CONSOLE=y

2
tests/kernel/fp_sharing/generic/prj_x86.conf
View file

@ -1,5 +1,5 @@
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_FLOAT=y CONFIG_FPU=y
CONFIG_SSE=y CONFIG_SSE=y
CONFIG_FP_SHARING=y CONFIG_FP_SHARING=y
CONFIG_SSE_FP_MATH=y CONFIG_SSE_FP_MATH=y

4
tests/kernel/fp_sharing/generic/src/main.c
View file

@ -9,8 +9,8 @@
#include "test_common.h" #include "test_common.h"
#ifndef CONFIG_FLOAT #ifndef CONFIG_FPU
#error Rebuild with the FLOAT config option enabled #error Rebuild with the FPU config option enabled
#endif #endif
#ifndef CONFIG_FP_SHARING #ifndef CONFIG_FP_SHARING

2
tests/lib/sprintf/prj.conf
View file

@ -1,2 +1,2 @@
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_FLOAT=y CONFIG_FPU=y

2
tests/lib/sprintf/src/main.c
View file

@ -64,7 +64,7 @@ void test_sprintf_double(void)
char buffer[400]; char buffer[400];
union raw_double_u var; union raw_double_u var;
#ifndef CONFIG_FLOAT #ifndef CONFIG_FPU
ztest_test_skip(); ztest_test_skip();
return; return;
#endif #endif