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soc: npcx: update register definition for espi vw

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This CL adds the field for the index of virtual wire and the enable bit.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
This commit is contained in:
Tom Chang 2024-08-15 13:48:12 +08:00 • committed by Maureen Helm
commit 0ded5623f2
1 changed files with 4 additions and 0 deletions
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soc/nuvoton/npcx/common/reg/reg_def.h
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@ -750,10 +750,14 @@ struct espi_reg {
#define NPCX_VWSWIRQ_EDGE_IRQ 28
#define NPCX_VWEVMS_WIRE FIELD(0, 4)
#define NPCX_VWEVMS_VALID FIELD(4, 4)
#define NPCX_VWEVMS_INDEX FIELD(8, 7)
#define NPCX_VWEVMS_INDEX_EN 15
#define NPCX_VWEVMS_IE 18
#define NPCX_VWEVMS_WE 20
#define NPCX_VWEVSM_WIRE FIELD(0, 4)
#define NPCX_VWEVSM_VALID FIELD(4, 4)
#define NPCX_VWEVSM_INDEX FIELD(8, 7)
#define NPCX_VWEVSM_INDEX_EN 15
#define NPCX_VWEVSM_BIT_VALID(n) (4+n)
#define NPCX_VWEVSM_HW_WIRE FIELD(24, 4)
#define NPCX_VWGPSM_INDEX_EN 15