drivers: i2s_cavs: convert to use device tree
This converts the i2s_cavs driver to use device tree instead of kconfig for device configuration. Fixes #30750 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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2 changed files with 84 additions and 167 deletions
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@ -3,72 +3,10 @@
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# Copyright (c) 2017 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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menuconfig I2S_CAVS
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config I2S_CAVS
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bool "Intel I2S (SSP) Bus Driver"
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depends on BOARD_INTEL_S1000_CRB
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select DMA
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help
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Enable Inter Sound (I2S) bus driver for Intel_S1000 based on
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Synchronous Serial Port (SSP) module.
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if I2S_CAVS
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config I2S_CAVS_DMA_NAME
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string "DMA device name"
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default "DMA_0"
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help
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Name of the DMA device this device driver can use.
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config I2S_CAVS_IRQ_PRI
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int "Interrupt priority"
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default 0
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config I2S_CAVS_1_NAME
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string "I2S 1 device name"
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default "I2S_1"
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config I2S_CAVS_1_DMA_TX_CHANNEL
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int "DMA TX channel"
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default 2
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help
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DMA channel number to use for I2S1 TX transfer.
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config I2S_CAVS_1_DMA_RX_CHANNEL
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int "DMA RX channel"
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default 3
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help
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DMA channel number to use for I2S1 RX transfer.
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config I2S_CAVS_2_NAME
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string "I2S 2 device name"
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default "I2S_2"
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config I2S_CAVS_2_DMA_TX_CHANNEL
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int "DMA TX channel"
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default 4
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help
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DMA channel number to use for I2S2 TX transfer.
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config I2S_CAVS_2_DMA_RX_CHANNEL
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int "DMA RX channel"
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default 5
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help
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DMA channel number to use for I2S2 RX transfer.
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config I2S_CAVS_3_NAME
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string "I2S 3 device name"
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default "I2S_3"
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config I2S_CAVS_3_DMA_TX_CHANNEL
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int "DMA TX channel"
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default 6
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help
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DMA channel number to use for I2S3 TX transfer.
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config I2S_CAVS_3_DMA_RX_CHANNEL
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int "DMA RX channel"
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default 7
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help
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DMA channel number to use for I2S3 RX transfer.
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endif # I2S_CAVS
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@ -12,6 +12,8 @@
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* enabled) and "interrupt on full transfer completion" mode.
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*/
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#define DT_DRV_COMPAT intel_cavs_i2s
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#include <errno.h>
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#include <string.h>
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#include <sys/__assert.h>
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@ -28,79 +30,6 @@
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#include <logging/log.h>
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LOG_MODULE_REGISTER(LOG_DOMAIN);
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#define I2S_IRQ_CONNECT(i2s_id) \
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IRQ_CONNECT(I2S##i2s_id##_CAVS_IRQ, \
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CONFIG_I2S_CAVS_IRQ_PRI, \
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i2s_cavs_isr, \
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DEVICE_GET(i2s##i2s_id##_cavs), 0)
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#define I2S_DEVICE_NAME(i2s_id) i2s##i2s_id##_cavs
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#define I2S_DEVICE_DATA_NAME(i2s_id) i2s##i2s_id##_cavs_data
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#define I2S_DEVICE_CONFIG_NAME(i2s_id) i2s##i2s_id##_cavs_config
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#define I2S_DEVICE_CONFIG_DEFINE(i2s_id) \
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static const struct i2s_cavs_config i2s##i2s_id##_cavs_config = {\
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.regs = (struct i2s_cavs_ssp *)SSP_BASE(i2s_id), \
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.mn_regs = (struct i2s_cavs_mn_div *)SSP_MN_DIV_BASE(i2s_id),\
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.irq_id = I2S##i2s_id##_CAVS_IRQ, \
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.irq_connect = i2s##i2s_id##_cavs_irq_connect, \
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}
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#define I2S_DMA_CHANNEL(i2s_id, dir) \
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CONFIG_I2S_CAVS_##i2s_id##_DMA_##dir##_CHANNEL
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#define I2S_DEVICE_OBJECT_DECLARE(i2s_id) \
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DEVICE_DECLARE(I2S_DEVICE_NAME(i2s_id))
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#define I2S_DEVICE_OBJECT(i2s_id) \
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DEVICE_GET(I2S_DEVICE_NAME(i2s_id))
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#define I2S_DEVICE_DATA_DEFINE(i2s_id) \
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static struct i2s_cavs_dev_data i2s##i2s_id##_cavs_data = {\
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.tx = { \
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.dma_channel = I2S_DMA_CHANNEL(i2s_id, TX), \
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.dma_cfg = { \
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dma_callback = i2s_dma_tx_callback, \
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.user_data = (void *)I2S_DEVICE_OBJECT(i2s_id),\
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.complete_callback_en = 1, \
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.error_callback_en = 1, \
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.block_count = 1, \
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.head_block = \
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&i2s##i2s_id##_cavs_data.tx.dma_block,\
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.channel_direction = MEMORY_TO_PERIPHERAL,\
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.dma_slot = DMA_HANDSHAKE_SSP##i2s_id##_TX,\
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}, \
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}, \
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.rx = { \
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.dma_channel = I2S_DMA_CHANNEL(i2s_id, RX), \
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.dma_cfg = { \
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dma_callback = i2s_dma_rx_callback,\
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.user_data = (void *)I2S_DEVICE_OBJECT(i2s_id),\
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.complete_callback_en = 1, \
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.error_callback_en = 1, \
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.block_count = 1, \
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.head_block = \
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&i2s##i2s_id##_cavs_data.rx.dma_block,\
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.channel_direction = PERIPHERAL_TO_MEMORY,\
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.dma_slot = DMA_HANDSHAKE_SSP##i2s_id##_RX,\
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}, \
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}, \
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}
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#define I2S_DEVICE_AND_API_INIT(i2s_id) \
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DEVICE_AND_API_INIT(I2S_DEVICE_NAME(i2s_id), \
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CONFIG_I2S_CAVS_##i2s_id##_NAME, \
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i2s_cavs_initialize, \
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&I2S_DEVICE_DATA_NAME(i2s_id), \
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&I2S_DEVICE_CONFIG_NAME(i2s_id), \
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POST_KERNEL, \
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CONFIG_I2S_INIT_PRIORITY, \
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&i2s_cavs_driver_api)
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/* length of the buffer queue */
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#define I2S_CAVS_BUF_Q_LEN 2
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@ -146,6 +75,7 @@ struct i2s_cavs_config {
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struct i2s_cavs_mn_div *mn_regs;
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uint32_t irq_id;
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void (*irq_connect)(void);
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const char *dma_name;
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};
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/* Device run time data */
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@ -162,10 +92,6 @@ struct i2s_cavs_dev_data {
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#define DEV_DATA(dev) \
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((struct i2s_cavs_dev_data *const)(dev)->data)
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I2S_DEVICE_OBJECT_DECLARE(1);
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I2S_DEVICE_OBJECT_DECLARE(2);
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I2S_DEVICE_OBJECT_DECLARE(3);
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static void i2s_dma_tx_callback(const struct device *, void *, uint32_t, int);
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static void i2s_tx_stream_disable(struct i2s_cavs_dev_data *,
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volatile struct i2s_cavs_ssp *const, const struct device *);
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@ -847,9 +773,9 @@ static int i2s_cavs_initialize(const struct device *dev)
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const struct i2s_cavs_config *const dev_cfg = DEV_CFG(dev);
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struct i2s_cavs_dev_data *const dev_data = DEV_DATA(dev);
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dev_data->dev_dma = device_get_binding(CONFIG_I2S_CAVS_DMA_NAME);
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dev_data->dev_dma = device_get_binding(dev_cfg->dma_name);
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if (!dev_data->dev_dma) {
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LOG_ERR("%s device not found", CONFIG_I2S_CAVS_DMA_NAME);
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LOG_ERR("%s device not found", dev_cfg->dma_name);
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return -ENODEV;
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}
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@ -881,29 +807,82 @@ static const struct i2s_driver_api i2s_cavs_driver_api = {
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.trigger = i2s_cavs_trigger,
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};
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static void i2s1_cavs_irq_connect(void)
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{
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I2S_IRQ_CONNECT(1);
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}
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#define I2S_CAVS_DEVICE_INIT(n) \
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DEVICE_DT_INST_DECLARE(n); \
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static void i2s_cavs_irq_connect_##n(void); \
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\
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static const struct i2s_cavs_config i2s_cavs_config_##n = { \
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.regs = (struct i2s_cavs_ssp *) \
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DT_INST_REG_ADDR_BY_IDX(n, 0), \
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.mn_regs = (struct i2s_cavs_mn_div *) \
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DT_INST_REG_ADDR_BY_IDX(n, 1), \
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.irq_id = DT_INST_IRQN(n), \
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.irq_connect = i2s_cavs_irq_connect_##n, \
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.dma_name = DT_INST_DMAS_LABEL_BY_NAME(n, tx), \
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}; \
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\
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static struct i2s_cavs_dev_data i2s_cavs_data_##n = { \
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.tx = { \
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.dma_channel = \
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DT_INST_DMAS_CELL_BY_NAME(n, tx, channel),\
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.dma_cfg = { \
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.source_burst_length = \
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CAVS_I2S_DMA_BURST_SIZE, \
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.dest_burst_length = \
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CAVS_I2S_DMA_BURST_SIZE, \
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.dma_callback = i2s_dma_tx_callback, \
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.user_data = \
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(void *)DEVICE_DT_INST_GET(n), \
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.complete_callback_en = 1, \
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.error_callback_en = 1, \
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.block_count = 1, \
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.head_block = \
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&i2s_cavs_data_##n.tx.dma_block,\
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.channel_direction = \
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MEMORY_TO_PERIPHERAL,\
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.dma_slot = \
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DT_INST_DMAS_CELL_BY_NAME(n, tx, channel),\
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}, \
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}, \
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.rx = { \
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.dma_channel = \
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DT_INST_DMAS_CELL_BY_NAME(n, rx, channel),\
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.dma_cfg = { \
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.source_burst_length = \
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CAVS_I2S_DMA_BURST_SIZE, \
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.dest_burst_length = \
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CAVS_I2S_DMA_BURST_SIZE, \
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.dma_callback = i2s_dma_rx_callback, \
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.user_data = \
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(void *)DEVICE_DT_INST_GET(n), \
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.complete_callback_en = 1, \
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.error_callback_en = 1, \
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.block_count = 1, \
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.head_block = \
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&i2s_cavs_data_##n.rx.dma_block,\
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.channel_direction = \
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PERIPHERAL_TO_MEMORY,\
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.dma_slot = \
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DT_INST_DMAS_CELL_BY_NAME(n, rx, channel),\
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}, \
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}, \
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, \
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i2s_cavs_initialize, device_pm_control_nop, \
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&i2s_cavs_data_##n, \
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&i2s_cavs_config_##n, \
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POST_KERNEL, CONFIG_I2S_INIT_PRIORITY, \
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&i2s_cavs_driver_api); \
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\
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static void i2s_cavs_irq_connect_##n(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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i2s_cavs_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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\
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irq_enable(DT_INST_IRQN(n)); \
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}
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I2S_DEVICE_CONFIG_DEFINE(1);
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I2S_DEVICE_DATA_DEFINE(1);
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I2S_DEVICE_AND_API_INIT(1);
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static void i2s2_cavs_irq_connect(void)
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{
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I2S_IRQ_CONNECT(2);
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}
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I2S_DEVICE_CONFIG_DEFINE(2);
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I2S_DEVICE_DATA_DEFINE(2);
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I2S_DEVICE_AND_API_INIT(2);
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static void i2s3_cavs_irq_connect(void)
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{
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I2S_IRQ_CONNECT(3);
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}
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I2S_DEVICE_CONFIG_DEFINE(3);
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I2S_DEVICE_DATA_DEFINE(3);
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I2S_DEVICE_AND_API_INIT(3);
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DT_INST_FOREACH_STATUS_OKAY(I2S_CAVS_DEVICE_INIT)
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