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esp32: drivers: interrupt_controller: review WDT interrupt usage

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Review WDT interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira 2021-04-20 15:26:23 -03:00 • committed by Christopher Friedt
commit 0cf0830ead
4 changed files with 36 additions and 64 deletions
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18
drivers/watchdog/Kconfig.esp32
View file

@ -3,25 +3,9 @@
# Copyright (C) 2017 Intel Corporation # Copyright (C) 2017 Intel Corporation
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
menuconfig WDT_ESP32 config WDT_ESP32
bool "ESP32 Watchdog (WDT) Driver" bool "ESP32 Watchdog (WDT) Driver"
depends on SOC_ESP32 depends on SOC_ESP32
default y default y
help help
Enable WDT driver for ESP32. Enable WDT driver for ESP32.
config WDT0_ESP32_IRQ
int "IRQ line for watchdog interrupt"
depends on WDT_ESP32
default 24
help
Set the IRQ line used by the WDT device. Very few lines can be
chosen here, as it must be a level 4 interrupt.
config WDT1_ESP32_IRQ
int "IRQ line for watchdog interrupt"
depends on WDT_ESP32
default 25
help
Set the IRQ line used by the WDT device. Very few lines can be
chosen here, as it must be a level 4 interrupt.

75
drivers/watchdog/wdt_esp32.c
View file

@ -10,9 +10,9 @@
#include <soc/rtc_cntl_reg.h> #include <soc/rtc_cntl_reg.h>
#include <soc/timer_group_reg.h> #include <soc/timer_group_reg.h>
#include <soc.h>
#include <string.h> #include <string.h>
#include <drivers/watchdog.h> #include <drivers/watchdog.h>
#include <drivers/interrupt_controller/intc_esp32.h>
#include <device.h> #include <device.h>
/* FIXME: This struct shall be removed from here, when esp32 timer driver got /* FIXME: This struct shall be removed from here, when esp32 timer driver got
@ -44,17 +44,14 @@ struct wdt_esp32_data {
uint32_t timeout; uint32_t timeout;
enum wdt_mode mode; enum wdt_mode mode;
wdt_callback_t callback; wdt_callback_t callback;
int irq_line;
}; };
struct wdt_esp32_config { struct wdt_esp32_config {
void (*connect_irq)(void); void (*connect_irq)(void);
const struct wdt_esp32_regs_t *base; const struct wdt_esp32_regs_t *base;
const struct timer_esp32_irq_regs_t irq_regs; const struct timer_esp32_irq_regs_t irq_regs;
int irq_source;
const struct {
int source;
int line;
} irq;
}; };
#define DEV_CFG(dev) \ #define DEV_CFG(dev) \
@ -106,7 +103,7 @@ static void adjust_timeout(const struct device *dev, uint32_t timeout)
DEV_BASE(dev)->config3 = timeout; DEV_BASE(dev)->config3 = timeout;
} }
static void wdt_esp32_isr(const struct device *dev); static void wdt_esp32_isr(void *arg);
static int wdt_esp32_feed(const struct device *dev, int channel_id) static int wdt_esp32_feed(const struct device *dev, int channel_id)
{ {
@ -123,10 +120,10 @@ static void set_interrupt_enabled(const struct device *dev, bool setting)
if (setting) { if (setting) {
*DEV_CFG(dev)->irq_regs.timer_int_ena |= TIMG_WDT_INT_ENA; *DEV_CFG(dev)->irq_regs.timer_int_ena |= TIMG_WDT_INT_ENA;
irq_enable(DEV_CFG(dev)->irq.line); irq_enable(DEV_DATA(dev)->irq_line);
} else { } else {
*DEV_CFG(dev)->irq_regs.timer_int_ena &= ~TIMG_WDT_INT_ENA; *DEV_CFG(dev)->irq_regs.timer_int_ena &= ~TIMG_WDT_INT_ENA;
irq_disable(DEV_CFG(dev)->irq.line); irq_disable(DEV_DATA(dev)->irq_line);
} }
} }
@ -202,6 +199,9 @@ static int wdt_esp32_install_timeout(const struct device *dev,
static int wdt_esp32_init(const struct device *dev) static int wdt_esp32_init(const struct device *dev)
{ {
const struct wdt_esp32_config *const config = DEV_CFG(dev);
struct wdt_esp32_data *data = DEV_DATA(dev);
#ifdef CONFIG_WDT_DISABLE_AT_BOOT #ifdef CONFIG_WDT_DISABLE_AT_BOOT
wdt_esp32_disable(dev); wdt_esp32_disable(dev);
#endif #endif
@ -209,8 +209,7 @@ static int wdt_esp32_init(const struct device *dev)
/* This is a level 4 interrupt, which is handled by _Level4Vector, /* This is a level 4 interrupt, which is handled by _Level4Vector,
* located in xtensa_vectors.S. * located in xtensa_vectors.S.
*/ */
irq_disable(DEV_CFG(dev)->irq.line); data->irq_line = esp_intr_alloc(config->irq_source, 0, wdt_esp32_isr, (void *)dev, NULL);
DEV_CFG(dev)->connect_irq();
wdt_esp32_enable(dev); wdt_esp32_enable(dev);
@ -224,42 +223,28 @@ static const struct wdt_driver_api wdt_api = {
.feed = wdt_esp32_feed .feed = wdt_esp32_feed
}; };
#define ESP32_WDT_INIT(idx) \ #define ESP32_WDT_INIT(idx) \
static void wdt_esp32_connect_irq_func##idx(void) \ static struct wdt_esp32_data wdt##idx##_data; \
{ \ static struct wdt_esp32_config wdt_esp32_config##idx = { \
esp32_rom_intr_matrix_set(0, ETS_TG##idx##_WDT_LEVEL_INTR_SOURCE, \ .base = (struct wdt_esp32_regs_t *) DT_INST_REG_ADDR(idx), \
CONFIG_WDT##idx##_ESP32_IRQ); \ .irq_regs = { \
IRQ_CONNECT(CONFIG_WDT##idx##_ESP32_IRQ, \ .timer_int_ena = (uint32_t *)TIMG_INT_ENA_TIMERS_REG(idx), \
4, \ .timer_int_clr = (uint32_t *)TIMG_INT_CLR_TIMERS_REG(idx), \
wdt_esp32_isr, \ }, \
DEVICE_DT_INST_GET(idx), \ .irq_source = DT_IRQN(DT_NODELABEL(wdt##idx)), \
0); \ }; \
} \ \
\ DEVICE_DT_INST_DEFINE(idx, \
static struct wdt_esp32_data wdt##idx##_data; \ wdt_esp32_init, \
static struct wdt_esp32_config wdt_esp32_config##idx = { \ NULL, \
.base = (struct wdt_esp32_regs_t *) DT_INST_REG_ADDR(idx), \ &wdt##idx##_data, \
.irq_regs = { \ &wdt_esp32_config##idx, \
.timer_int_ena = (uint32_t *)TIMG_INT_ENA_TIMERS_REG(idx), \ PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
.timer_int_clr = (uint32_t *)TIMG_INT_CLR_TIMERS_REG(idx), \ &wdt_api)
}, \
.irq = { \
.source = ETS_TG##idx##_WDT_LEVEL_INTR_SOURCE, \
.line = CONFIG_WDT##idx##_ESP32_IRQ, \
}, \
.connect_irq = wdt_esp32_connect_irq_func##idx \
}; \
\
DEVICE_DT_INST_DEFINE(idx, \
wdt_esp32_init, \
NULL, \
&wdt##idx##_data, \
&wdt_esp32_config##idx, \
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
&wdt_api)
static void wdt_esp32_isr(const struct device *dev) static void wdt_esp32_isr(void *arg)
{ {
const struct device *dev = (const struct device *)arg;
struct wdt_esp32_data *data = DEV_DATA(dev); struct wdt_esp32_data *data = DEV_DATA(dev);
if (data->callback) { if (data->callback) {

6
dts/xtensa/espressif/esp32.dtsi
View file

@ -167,7 +167,8 @@
wdt0: watchdog@3ff5f048 { wdt0: watchdog@3ff5f048 {
compatible = "espressif,esp32-watchdog"; compatible = "espressif,esp32-watchdog";
reg = <0x3ff5f048 0x20>; reg = <0x3ff5f048 0x20>;
/* interrupts = <24>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ interrupts = <TG0_WDT_LEVEL_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "WDT_0"; label = "WDT_0";
status = "okay"; status = "okay";
}; };
@ -175,7 +176,8 @@
wdt1: watchdog@3ff60048 { wdt1: watchdog@3ff60048 {
compatible = "espressif,esp32-watchdog"; compatible = "espressif,esp32-watchdog";
reg = <0x3ff60048 0x20>; reg = <0x3ff60048 0x20>;
/* interrupts = <25>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ interrupts = <TG1_WDT_LEVEL_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "WDT_1"; label = "WDT_1";
status = "disabled"; status = "disabled";
}; };

1
samples/drivers/watchdog/boards/esp32.conf Normal file
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@ -0,0 +1 @@
CONFIG_HEAP_MEM_POOL_SIZE=256