soc: intel_adsp: tools: merge cavstool.py and acetool.py code
Merge codebases of cavstool.py and acetool.py as the two have a lot of duplicated code. To ease with transition, keep acetool.py around with implementation imported from cavstool.py. This will help to keep any automated testing flows working that assume both tools exist. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit is contained in:
Kai Vehmanen
Johan Hedberg
parent
7046c9030e
commit
0ca7ef78bc
2 changed files with 227 additions and 751 deletions
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@ -21,15 +21,18 @@ PAGESZ = 4096
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HUGEPAGESZ = 2 * 1024 * 1024
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HUGEPAGE_FILE = "/dev/hugepages/cavs-fw-dma.tmp."
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# SRAM windows. Each appears in a 128k region starting at 512k.
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# SRAM windows. Base and stride varies depending on ADSP version
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#
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# Window 0 is the FW_STATUS area, and 4k after that the IPC "outbox"
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# Window 1 is the IPC "inbox" (host-writable memory, just 384 bytes currently)
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# Window 2 is unused by this script
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# Window 2 is debug, divided into multiple slots, unused by this script
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# Window 3 is winstream-formatted log output
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OUTBOX_OFFSET = (512 + (0 * 128)) * 1024 + 4096
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INBOX_OFFSET = (512 + (1 * 128)) * 1024
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WINSTREAM_OFFSET = (512 + (3 * 128)) * 1024
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WINDOW_BASE = 0x80000
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WINDOW_STRIDE = 0x20000
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WINDOW_BASE_ACE = 0x180000
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WINDOW_STRIDE_ACE = 0x8000
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# pylint: disable=duplicate-code
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@ -188,17 +191,34 @@ class HDAStream:
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self.debug()
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log.info(f"Reset stream {self.stream_id}")
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def adsp_is_cavs():
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return cavs15 or cavs18 or cavs15
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def adsp_is_ace():
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return ace15 or ace20
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def adsp_mem_window_config():
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if adsp_is_ace():
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base = WINDOW_BASE_ACE
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stride = WINDOW_STRIDE_ACE
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else:
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base = WINDOW_BASE
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stride = WINDOW_STRIDE
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return (base, stride)
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def map_regs():
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p = runx(f"grep -iEl 'PCI_CLASS=40(10|38)0' /sys/bus/pci/devices/*/uevent")
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pcidir = os.path.dirname(p)
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# Platform/quirk detection. ID lists cribbed from the SOF kernel driver
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global cavs15, cavs18, cavs25
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global cavs15, cavs18, cavs25, ace15, ace20
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did = int(open(f"{pcidir}/device").read().rstrip(), 16)
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cavs15 = did in [ 0x5a98, 0x1a98, 0x3198 ]
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cavs18 = did in [ 0x9dc8, 0xa348, 0x02c8, 0x06c8, 0xa3f0 ]
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cavs25 = did in [ 0xa0c8, 0x43c8, 0x4b55, 0x4b58, 0x7ad0, 0x51c8 ]
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ace15 = did in [ 0x7e28 ]
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ace20 = did in [ 0xa828 ]
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# Check sysfs for a loaded driver and remove it
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if os.path.exists(f"{pcidir}/driver"):
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@ -249,14 +269,28 @@ def map_regs():
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global bar4_mmap
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(bar4_mem, bar4_mmap) = bar_map(pcidir, 4)
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dsp = Regs(bar4_mem)
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dsp.ADSPCS = 0x00004
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dsp.HIPCTDR = 0x00040 if cavs15 else 0x000c0
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dsp.HIPCTDA = 0x000c4 # 1.8+ only
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dsp.HIPCTDD = 0x00044 if cavs15 else 0x000c8
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dsp.HIPCIDR = 0x00048 if cavs15 else 0x000d0
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dsp.HIPCIDA = 0x000d4 # 1.8+ only
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dsp.HIPCIDD = 0x0004c if cavs15 else 0x000d8
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dsp.SRAM_FW_STATUS = 0x80000 # Start of first SRAM window
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if adsp_is_ace():
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dsp.HFDSSCS = 0x1000
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dsp.HFPWRCTL = 0x1d18
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dsp.HFPWRSTS = 0x1d1c
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dsp.DSP2CXCTL_PRIMARY = 0x178d04
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dsp.HFIPCXTDR = 0x73200
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dsp.HFIPCXTDA = 0x73204
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dsp.HFIPCXIDR = 0x73210
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dsp.HFIPCXIDA = 0x73214
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dsp.HFIPCXCTL = 0x73228
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dsp.HFIPCXTDDY = 0x73300
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dsp.HFIPCXIDDY = 0x73380
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dsp.SRAM_FW_STATUS = WINDOW_BASE_ACE
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else:
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dsp.ADSPCS = 0x00004
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dsp.HIPCTDR = 0x00040 if cavs15 else 0x000c0
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dsp.HIPCTDA = 0x000c4 # 1.8+ only
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dsp.HIPCTDD = 0x00044 if cavs15 else 0x000c8
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dsp.HIPCIDR = 0x00048 if cavs15 else 0x000d0
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dsp.HIPCIDA = 0x000d4 # 1.8+ only
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dsp.HIPCIDD = 0x0004c if cavs15 else 0x000d8
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dsp.SRAM_FW_STATUS = WINDOW_BASE # Start of first SRAM window
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dsp.freeze()
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return (hda, sd, dsp, hda_ostream_id)
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@ -461,6 +495,128 @@ def load_firmware(fw_file):
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sd.CTL |= 1
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log.info(f"cAVS firmware load complete")
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def load_firmware_ace(fw_file):
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try:
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fw_bytes = open(fw_file, "rb").read()
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# Resize fw_bytes for MTL
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if len(fw_bytes) < 512 * 1024:
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fw_bytes += b'\x00' * (512 * 1024 - len(fw_bytes))
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except Exception as e:
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log.error(f"Could not read firmware file: `{fw_file}'")
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log.error(e)
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sys.exit(1)
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(magic, sz) = struct.unpack("4sI", fw_bytes[0:8])
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if magic == b'$AE1':
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log.info(f"Trimming {sz} bytes of extended manifest")
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fw_bytes = fw_bytes[sz:len(fw_bytes)]
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# This actually means "enable access to BAR4 registers"!
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hda.PPCTL |= (1 << 30) # GPROCEN, "global processing enable"
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log.info("Resetting HDA device")
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hda.GCTL = 0
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while hda.GCTL & 1: pass
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hda.GCTL = 1
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while not hda.GCTL & 1: pass
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log.info("Turning of DSP subsystem")
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dsp.HFDSSCS &= ~(1 << 16) # clear SPA bit
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time.sleep(0.002)
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# wait for CPA bit clear
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while dsp.HFDSSCS & (1 << 24):
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log.info("Waiting for DSP subsystem power off")
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time.sleep(0.1)
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log.info("Turning on DSP subsystem")
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dsp.HFDSSCS |= (1 << 16) # set SPA bit
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time.sleep(0.002) # needed as the CPA bit may be unstable
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# wait for CPA bit
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while not dsp.HFDSSCS & (1 << 24):
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log.info("Waiting for DSP subsystem power on")
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time.sleep(0.1)
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log.info("Turning on Domain0")
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dsp.HFPWRCTL |= 0x1 # set SPA bit
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time.sleep(0.002) # needed as the CPA bit may be unstable
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# wait for CPA bit
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while not dsp.HFPWRSTS & 0x1:
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log.info("Waiting for DSP domain0 power on")
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time.sleep(0.1)
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log.info("Turning off Primary Core")
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dsp.DSP2CXCTL_PRIMARY &= ~(0x1) # clear SPA
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time.sleep(0.002) # wait for CPA settlement
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while dsp.DSP2CXCTL_PRIMARY & (1 << 8):
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log.info("Waiting for DSP primary core power off")
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time.sleep(0.1)
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log.info(f"Configuring HDA stream {hda_ostream_id} to transfer firmware image")
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(buf_list_addr, num_bufs) = setup_dma_mem(fw_bytes)
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sd.CTL = 1
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while (sd.CTL & 1) == 0: pass
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sd.CTL = 0
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while (sd.CTL & 1) == 1: pass
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sd.CTL |= (1 << 20) # Set stream ID to anything non-zero
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sd.BDPU = (buf_list_addr >> 32) & 0xffffffff
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sd.BDPL = buf_list_addr & 0xffffffff
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sd.CBL = len(fw_bytes)
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sd.LVI = num_bufs - 1
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hda.PPCTL |= (1 << hda_ostream_id)
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# SPIB ("Software Position In Buffer") is an Intel HDA extension
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# that puts a transfer boundary into the stream beyond which the
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# other side will not read. The ROM wants to poll on a "buffer
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# full" bit on the other side that only works with this enabled.
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hda.SPBFCTL |= (1 << hda_ostream_id)
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hda.SD_SPIB = len(fw_bytes)
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# Send the DSP an IPC message to tell the device how to boot.
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# Note: with cAVS 1.8+ the ROM receives the stream argument as an
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# index within the array of output streams (and we always use the
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# first one by construction). But with 1.5 it's the HDA index,
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# and depends on the number of input streams on the device.
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stream_idx = 0
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ipcval = ( (1 << 31) # BUSY bit
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| (0x01 << 24) # type = PURGE_FW
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| (1 << 14) # purge_fw = 1
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| (stream_idx << 9)) # dma_id
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log.info(f"Sending IPC command, HFIPCXIDR = 0x{ipcval:x}")
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dsp.HFIPCXIDR = ipcval
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log.info("Turning on Primary Core")
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dsp.DSP2CXCTL_PRIMARY |= 0x1 # clear SPA
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time.sleep(0.002) # wait for CPA settlement
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while not dsp.DSP2CXCTL_PRIMARY & (1 << 8):
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log.info("Waiting for DSP primary core power on")
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time.sleep(0.1)
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log.info("Waiting for IPC acceptance")
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while dsp.HFIPCXIDR & (1 << 31):
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log.info("Waiting for IPC busy bit clear")
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time.sleep(0.1)
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log.info("ACK IPC")
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dsp.HFIPCXIDA |= (1 << 31)
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log.info(f"Starting DMA, FW_STATUS = 0x{dsp.SRAM_FW_STATUS:x}")
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sd.CTL |= 2 # START flag
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wait_fw_entered()
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# Turn DMA off and reset the stream. Clearing START first is a
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# noop per the spec, but absolutely required for stability.
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# Apparently the reset doesn't stop the stream, and the next load
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# starts before it's ready and kills the load (and often the DSP).
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# The sleep too is required, on at least one board (a fast
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# chromebook) putting the two writes next each other also hangs
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# the DSP!
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sd.CTL &= ~2 # clear START
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time.sleep(0.1)
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sd.CTL |= 1
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log.info(f"ACE firmware load complete")
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def fw_is_alive():
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return dsp.SRAM_FW_STATUS & ((1 << 28) - 1) == 5 # "FW_ENTERED"
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@ -485,17 +641,20 @@ def wait_fw_entered(timeout_s=2):
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else:
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log.info("FW alive, FW_STATUS = 0x%x", dsp.SRAM_FW_STATUS)
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def winstream_offset():
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( base, stride ) = adsp_mem_window_config()
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return base + stride * 3
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# This SHOULD be just "mem[start:start+length]", but slicing an mmap
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# array seems to be unreliable on one of my machines (python 3.6.9 on
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# Ubuntu 18.04). Read out bytes individually.
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def win_read(start, length):
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try:
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return b''.join(bar4_mmap[WINSTREAM_OFFSET + x].to_bytes(1, 'little')
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return b''.join(bar4_mmap[winstream_offset() + x].to_bytes(1, 'little')
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for x in range(start, start + length))
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except IndexError as ie:
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# A FW in a bad state may cause winstream garbage
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log.error("IndexError in bar4_mmap[%d + %d]", WINSTREAM_OFFSET, start)
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log.error("IndexError in bar4_mmap[%d + %d]", winstream_offset(), start)
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log.error("bar4_mmap.size()=%d", bar4_mmap.size())
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raise ie
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@ -528,7 +687,18 @@ def winstream_read(last_seq):
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async def ipc_delay_done():
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await asyncio.sleep(0.1)
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dsp.HIPCTDA = 1<<31
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if adsp_is_ace():
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dsp.HFIPCXTDA = ~(1<<31) & dsp.HFIPCXTDA # Signal done
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else:
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dsp.HIPCTDA = 1<<31
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def inbox_offset():
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( base, stride ) = adsp_mem_window_config()
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return base + stride
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def outbox_offset():
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( base, _ ) = adsp_mem_window_config()
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return base + 4096
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ipc_timestamp = 0
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@ -554,8 +724,8 @@ def ipc_command(data, ext_data):
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ipc_timestamp = t
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send_msg = True
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elif data == 5: # copy word at outbox[ext_data >> 16] to inbox[ext_data & 0xffff]
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src = OUTBOX_OFFSET + 4 * (ext_data >> 16)
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dst = INBOX_OFFSET + 4 * (ext_data & 0xffff)
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src = outbox_offset() + 4 * (ext_data >> 16)
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dst = inbox_offset() + 4 * (ext_data & 0xffff)
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for i in range(4):
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bar4_mmap[dst + i] = bar4_mmap[src + i]
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elif data == 6: # HDA RESET (init if not exists)
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@ -634,15 +804,37 @@ def ipc_command(data, ext_data):
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return
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dsp.HIPCTDR = 1<<31 # Ack local interrupt, also signals DONE on v1.5
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if cavs18:
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time.sleep(0.01) # Needed on 1.8, or the command below won't send!
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if adsp_is_ace():
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dsp.HFIPCXTDR = 1<<31 # Ack local interrupt, also signals DONE on v1.5
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if done:
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dsp.HFIPCXTDA = ~(1<<31) & dsp.HFIPCXTDA # Signal done
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if send_msg:
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log.debug("ipc: sending msg 0x%08x" % ext_data)
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dsp.HFIPCXIDDY = ext_data
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dsp.HFIPCXIDR = (1<<31) | ext_data
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else:
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dsp.HIPCTDR = 1<<31 # Ack local interrupt, also signals DONE on v1.5
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if cavs18:
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time.sleep(0.01) # Needed on 1.8, or the command below won't send!
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if done and not cavs15:
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dsp.HIPCTDA = 1<<31 # Signal done
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if send_msg:
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dsp.HIPCIDD = ext_data
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dsp.HIPCIDR = (1<<31) | ext_data
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if done and not cavs15:
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dsp.HIPCTDA = 1<<31 # Signal done
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if send_msg:
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dsp.HIPCIDD = ext_data
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dsp.HIPCIDR = (1<<31) | ext_data
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def handle_ipc():
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if adsp_is_ace():
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if dsp.HFIPCXIDA & 0x80000000:
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log.debug("ipc: Ack DSP reply with IDA_DONE")
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dsp.HFIPCXIDA = 1<<31 # must ACK any DONE interrupts that arrive!
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if dsp.HFIPCXTDR & 0x80000000:
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ipc_command(dsp.HFIPCXTDR & ~0x80000000, dsp.HFIPCXTDDY)
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return
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if dsp.HIPCIDA & 0x80000000:
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dsp.HIPCIDA = 1<<31 # must ACK any DONE interrupts that arrive!
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if dsp.HIPCTDR & 0x80000000:
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ipc_command(dsp.HIPCTDR & ~0x80000000, dsp.HIPCTDD)
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async def main():
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#TODO this bit me, remove the globals, write a little FirmwareLoader class or something to contain.
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@ -664,8 +856,12 @@ async def main():
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log.error("Firmware file argument missing")
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sys.exit(1)
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load_firmware(args.fw_file)
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if adsp_is_ace():
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load_firmware_ace(args.fw_file)
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else:
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load_firmware(args.fw_file)
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time.sleep(0.1)
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if not args.quiet:
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sys.stdout.write("--\n")
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@ -679,10 +875,7 @@ async def main():
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sys.stdout.write(output)
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sys.stdout.flush()
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if not args.log_only:
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if dsp.HIPCIDA & 0x80000000:
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dsp.HIPCIDA = 1<<31 # must ACK any DONE interrupts that arrive!
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if dsp.HIPCTDR & 0x80000000:
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ipc_command(dsp.HIPCTDR & ~0x80000000, dsp.HIPCTDD)
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handle_ipc()
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ap = argparse.ArgumentParser(description="DSP loader/logger tool", allow_abbrev=False)
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